Support RV32FC

[fourcolor]

This patch is aimed at supporting RV32FC-only instructions.

• The following instructions are implemented: C.FSW, C.FLW, C.FSWSP, C.FLWSP.
• Update README.md for the corresponding extension description.
• Add corresponding RISC-V architectural tests suites

Close #315

[jserv]

Refine the README.md for the corresponding extension description.

[jserv]

1. Append Close #315 at the end of git commit message.
2. Attempt to run the corresponding RISC-V Architectural Tests when possible.

[visitorckw]

The current riscv-arch-test does not include a test suite for RV32FC. However, we could explore using riscv-ctg to generate a suitable test suite.

[visitorckw]

Similar to commit cfa1c9f, we need to conduct alignment checks on load/store addresses.

[fourcolor]

After a few days of researching riscv-ctg, I consider it is challenging to develop a related test suite in a short period. Therefore, I would like to inquire whether adding a TODO comment in the code or opening an issue, along with explaining in the README that certain parts have not undergone arch-test testing, would be a better practice.

[jserv]

After a few days of researching riscv-ctg, I consider it is challenging to develop a related test suite in a short period.

Rather than expanding existing compilation suites, it would be more effective to develop a straightforward, specialized test program specifically for validating RV32FC support.

[fourcolor]

I ultimately managed to figure out how to use riscv-ctg to generate relevant test suites, and I also added tests for RV32FC in the CI.

[jserv]

Thank @fourcolor for contributing!