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audio: base_fw: move IPC4_MEMORY_STATE_INFO_GET code to platform
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The implementation for IPC4_MEMORY_STATE_INFO_GET requires
reading direct register contents to fill out the structure,
so this is by definition platform specific code. Move this
to platform implementation.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
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@kv2019i
kv2019i committed Apr 18, 2024
1 parent ba85129 commit 29eda8e
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Showing 2 changed files with 83 additions and 86 deletions.
86 changes: 0 additions & 86 deletions src/audio/base_fw.c
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Original file line number Diff line number Diff line change
Expand Up @@ -33,11 +33,6 @@
#endif
#include <zephyr/logging/log_ctrl.h>

/* TODO: Remove platform-specific code, see https://github.com/thesofproject/sof/issues/7549 */
#if defined(CONFIG_SOC_SERIES_INTEL_ADSP_ACE) || defined(CONFIG_INTEL_ADSP_CAVS)
# define INTEL_ADSP 1
#endif

LOG_MODULE_REGISTER(basefw, CONFIG_SOF_LOG_LEVEL);

/* 0e398c32-5ade-ba4b-93b1-c50432280ee4 */
Expand Down Expand Up @@ -163,85 +158,6 @@ static int basefw_hw_config(uint32_t *data_offset, char *data)
return 0;
}

/* There are two types of sram memory : high power mode sram and
* low power mode sram. This function retures memory size in page
* , memory bank power and usage status of each sram to host driver
*/
static int basefw_mem_state_info(uint32_t *data_offset, char *data)
{
struct sof_tlv *tuple = (struct sof_tlv *)data;
struct ipc4_sram_state_info info;
uint32_t *tuple_data;
uint32_t index;
uint32_t size;
uint16_t *ptr;
int i;

/* set hpsram */
info.free_phys_mem_pages = SRAM_BANK_SIZE * PLATFORM_HPSRAM_EBB_COUNT / HOST_PAGE_SIZE;
info.ebb_state_dword_count = SOF_DIV_ROUND_UP(PLATFORM_HPSRAM_EBB_COUNT, 32);
info.page_alloc_struct.page_alloc_count = PLATFORM_HPSRAM_EBB_COUNT;
size = sizeof(info) + info.ebb_state_dword_count * sizeof(uint32_t) +
info.page_alloc_struct.page_alloc_count * sizeof(uint32_t);
size = ALIGN(size, 4);
/* size is also saved as tuple length */
tuple_data = rballoc(0, SOF_MEM_CAPS_RAM, size);

/* save memory info in data array since info length is variable */
index = 0;
tuple_data[index++] = info.free_phys_mem_pages;
tuple_data[index++] = info.ebb_state_dword_count;
for (i = 0; i < info.ebb_state_dword_count; i++) {
#ifdef INTEL_ADSP
tuple_data[index + i] = io_reg_read(SHIM_HSPGCTL(i));
#else
tuple_data[index + i] = 0;
#endif
}
index += info.ebb_state_dword_count;

tuple_data[index++] = info.page_alloc_struct.page_alloc_count;
/* TLB is not supported now, so all pages are marked as occupied
* TODO: add page-size allocator and TLB support
*/
ptr = (uint16_t *)(tuple_data + index);
for (i = 0; i < info.page_alloc_struct.page_alloc_count; i++)
ptr[i] = 0xfff;

tlv_value_set(tuple, IPC4_HPSRAM_STATE, size, tuple_data);

/* set lpsram */
info.free_phys_mem_pages = 0;
info.ebb_state_dword_count = SOF_DIV_ROUND_UP(PLATFORM_LPSRAM_EBB_COUNT, 32);
info.page_alloc_struct.page_alloc_count = PLATFORM_LPSRAM_EBB_COUNT;
size = sizeof(info) + info.ebb_state_dword_count * sizeof(uint32_t) +
info.page_alloc_struct.page_alloc_count * sizeof(uint32_t);
size = ALIGN(size, 4);

index = 0;
tuple_data[index++] = info.free_phys_mem_pages;
tuple_data[index++] = info.ebb_state_dword_count;
#ifdef INTEL_ADSP
tuple_data[index++] = io_reg_read(LSPGCTL);
#else
tuple_data[index++] = 0;
#endif
tuple_data[index++] = info.page_alloc_struct.page_alloc_count;
ptr = (uint16_t *)(tuple_data + index);
for (i = 0; i < info.page_alloc_struct.page_alloc_count; i++)
ptr[i] = 0xfff;

tuple = tlv_next(tuple);
tlv_value_set(tuple, IPC4_LPSRAM_STATE, size, tuple_data);

/* calculate total tuple size */
tuple = tlv_next(tuple);
*data_offset = (int)((char *)tuple - data);

rfree(tuple_data);
return 0;
}

static log_timestamp_t basefw_get_timestamp(void)
{
return sof_cycle_get_64() + global_cycle_delta;
Expand Down Expand Up @@ -510,8 +426,6 @@ static int basefw_get_large_config(struct comp_dev *dev,
return basefw_config(data_offset, data);
case IPC4_HW_CONFIG_GET:
return basefw_hw_config(data_offset, data);
case IPC4_MEMORY_STATE_INFO_GET:
return basefw_mem_state_info(data_offset, data);
case IPC4_SYSTEM_TIME:
return basefw_get_system_time(data_offset, data);
case IPC4_EXTENDED_SYSTEM_TIME:
Expand Down
83 changes: 83 additions & 0 deletions src/platform/intel/ace/lib/base_fw_platform.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -58,13 +58,96 @@ int platform_basefw_hw_config(uint32_t *data_offset, char *data)
return 0;
}

/* There are two types of sram memory : high power mode sram and
* low power mode sram. This function retures memory size in page
* , memory bank power and usage status of each sram to host driver
*/
static int basefw_mem_state_info(uint32_t *data_offset, char *data)
{
struct sof_tlv *tuple = (struct sof_tlv *)data;
struct ipc4_sram_state_info info;
uint32_t *tuple_data;
uint32_t index;
uint32_t size;
uint16_t *ptr;
int i;

/* set hpsram */
info.free_phys_mem_pages = SRAM_BANK_SIZE * PLATFORM_HPSRAM_EBB_COUNT / HOST_PAGE_SIZE;
info.ebb_state_dword_count = SOF_DIV_ROUND_UP(PLATFORM_HPSRAM_EBB_COUNT, 32);
info.page_alloc_struct.page_alloc_count = PLATFORM_HPSRAM_EBB_COUNT;
size = sizeof(info) + info.ebb_state_dword_count * sizeof(uint32_t) +
info.page_alloc_struct.page_alloc_count * sizeof(uint32_t);
size = ALIGN(size, 4);
/* size is also saved as tuple length */
tuple_data = rballoc(0, SOF_MEM_CAPS_RAM, size);

/* save memory info in data array since info length is variable */
index = 0;
tuple_data[index++] = info.free_phys_mem_pages;
tuple_data[index++] = info.ebb_state_dword_count;
for (i = 0; i < info.ebb_state_dword_count; i++) {
tuple_data[index + i] = io_reg_read(SHIM_HSPGCTL(i));
}
index += info.ebb_state_dword_count;

tuple_data[index++] = info.page_alloc_struct.page_alloc_count;
/* TLB is not supported now, so all pages are marked as occupied
* TODO: add page-size allocator and TLB support
*/
ptr = (uint16_t *)(tuple_data + index);
for (i = 0; i < info.page_alloc_struct.page_alloc_count; i++)
ptr[i] = 0xfff;

tlv_value_set(tuple, IPC4_HPSRAM_STATE, size, tuple_data);

/* set lpsram */
info.free_phys_mem_pages = 0;
info.ebb_state_dword_count = SOF_DIV_ROUND_UP(PLATFORM_LPSRAM_EBB_COUNT, 32);
info.page_alloc_struct.page_alloc_count = PLATFORM_LPSRAM_EBB_COUNT;
size = sizeof(info) + info.ebb_state_dword_count * sizeof(uint32_t) +
info.page_alloc_struct.page_alloc_count * sizeof(uint32_t);
size = ALIGN(size, 4);

index = 0;
tuple_data[index++] = info.free_phys_mem_pages;
tuple_data[index++] = info.ebb_state_dword_count;
tuple_data[index++] = io_reg_read(LSPGCTL);
tuple_data[index++] = info.page_alloc_struct.page_alloc_count;
ptr = (uint16_t *)(tuple_data + index);
for (i = 0; i < info.page_alloc_struct.page_alloc_count; i++)
ptr[i] = 0xfff;

tuple = tlv_next(tuple);
tlv_value_set(tuple, IPC4_LPSRAM_STATE, size, tuple_data);

/* calculate total tuple size */
tuple = tlv_next(tuple);
*data_offset = (int)((char *)tuple - data);

rfree(tuple_data);
return 0;
}

int platform_basefw_get_large_config(struct comp_dev *dev,
uint32_t param_id,
bool first_block,
bool last_block,
uint32_t *data_offset,
char *data)
{
/* We can use extended param id for both extended and standard param id */
union ipc4_extended_param_id extended_param_id;

extended_param_id.full = param_id;

switch (extended_param_id.part.parameter_type) {
case IPC4_MEMORY_STATE_INFO_GET:
return basefw_mem_state_info(data_offset, data);
default:
break;
}

return -EINVAL;
}

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