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[DNM] intel_adsp: ace: dynamic clock switching #8423

Commits on Apr 18, 2024

  1. [DRAFT] west.yml: zephyr version update

    PR containing the required changes.
    
    Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
    tmleman committed Apr 18, 2024
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  2. config: ace: enable ARCH_CPU_IDLE_CUSTOM

    Enable the CONFIG_ARCH_CPU_IDLE_CUSTOM option for ACE platforms
    (meteorlake and lunarlake).
    
    This configuration allows the use of a custom arch_cpu_idle
    implementation, providing opportunities for platform-specific
    optimizations in power management.
    
    Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
    tmleman committed Apr 18, 2024
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  3. zephyr: pm_runtime: integrate dynamic clock switching support

    Integrate dynamic clock switching support into the power management
    runtime system for Intel ADSP platforms. This patch ensures that the clock
    switching mechanism is controlled in a thread-safe manner during power
    management operations.
    
    Changes include:
    
    - Initializing the intel_adsp_ace_pm_data structure to manage the clock
      switching lock state.
    - Modifying platform_pm_runtime_enable/disable functions to lock and
      unlock clock switching when the CORE_HP_CLK context is affected.
    
    Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
    tmleman committed Apr 18, 2024
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  4. ipc4: handler: stabilize clock during delayed ipc reply

    Ensure a stable clock frequency in the IPC4 handler during the wait for
    a delayed reply. This is achieved by disabling dynamic clock switching
    when entering the wait loop and re-enabling it upon exit or when a
    timeout occurs.
    
    The patch addresses potential timing issues that could arise from clock
    frequency changes while the core is in an idle state awaiting a response
    from a different thread that was scheduled by this IPC.
    
    The added calls to pm_runtime_disable/enable ensure that the high
    performance clock remains active during the critical wait period, thus
    maintaining the necessary processing speed and responsiveness of the
    IPC mechanism.
    
    Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
    tmleman committed Apr 18, 2024
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  5. ipc4: restore DSP clock on ipc message receipt

    With this patch, the adsp_clock_idle_exit function is called within the
    IPC message handler to reset the clock frequency if it was lowered
    during idle periods. This is crucial for maintaining the performance
    and responsiveness of the system when processing incoming IPC messages.
    
    The patch is conditionally compiled only when the
    CONFIG_ADSP_DYNAMIC_CLOCK_SWITCHING configuration option is enabled,
    ensuring that the functionality is available only on systems that
    support dynamic clock management.
    
    Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
    tmleman committed Apr 18, 2024
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  6. zephyr: ll-schedule: restore clock after idle in scheduler

    The adsp_clock_idle_exit function is invoked at the beginning of the
    scheduler thread function to reset the clock frequency if it was lowered
    during idle periods. This change is crucial for maintaining the
    performance and responsiveness of the system when it resumes work after
    being idle.
    
    This patch is conditionally compiled with
    CONFIG_ADSP_DYNAMIC_CLOCK_SWITCHING to ensure that the functionality is
    available only on systems that support dynamic clock management.
    
    Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
    tmleman committed Apr 18, 2024
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  7. config: ace: enable dynamic clock switching

    Enable the dynamic clock switching feature for Intel ADSP platforms. This
    feature allows the DSP to adjust its clock frequency dynamically when all
    cores enter the idle state, reducing energy consumption while waiting for
    interrupts.
    
    The following Kconfig options are added to MTL and LNL configuration:
    
    - CONFIG_PM_STATE_CUSTOM_DATA: Allows setting custom data pointers for
      specific power states.
    - CONFIG_ADSP_DYNAMIC_CLOCK_SWITCHING: Enables dynamic clock switching
      during idle states, dependent on the availability of custom power state
      data.
    
    This change is part of ongoing efforts to enhance power management
    capabilities and improve the energy efficiency of these platforms.
    
    Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
    tmleman committed Apr 18, 2024
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