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[DNM][DNR] Test #9023

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6 changes: 6 additions & 0 deletions app/boards/imx8qm_mek_mimx8qm6_adsp.conf
Original file line number Diff line number Diff line change
Expand Up @@ -2,3 +2,9 @@ CONFIG_IMX8=y
CONFIG_HAVE_AGENT=n
CONFIG_FORMAT_CONVERT_HIFI3=n
CONFIG_KPB_FORCE_COPY_TYPE_NORMAL=n
CONFIG_ZEPHYR_LOG=y
CONFIG_TRACE=n
CONFIG_DMA=y
CONFIG_DMA_NXP_EDMA_ENABLE_HALFMAJOR_IRQ=y
CONFIG_SHARED_INTERRUPTS=y
CONFIG_ZEPHYR_NATIVE_DRIVERS=y
52 changes: 45 additions & 7 deletions app/boards/imx8qm_mek_mimx8qm6_adsp.overlay
Original file line number Diff line number Diff line change
Expand Up @@ -4,15 +4,53 @@
* SPDX-License-Identifier: Apache-2.0
*/

/* TODO: this is a temporary workaround the fact that
* currently the Linux kernel doesn't enable MU2's power.
* As such, CCM (and all IPs that depend on Zephyr's
* clock management) are not usable.
*/
/ {
host_dma: dma {
compatible = "nxp,sof-host-dma";
dma-channels = <32>;
#dma-cells = <0>;
};
};

&lpuart2 {
/* note for developers: this is disabled
* because the firmware running on one of the M4
* cores uses the same LPUART instance. As such,
* to debug you need to make sure that:
* 1) Your SOF DTS doesn't include the RPMSG
* DTS but instead the base DTS (which is
* "imx8qm-mek.dts")
* 2) Your u-boot doesn't include the M4 firmware
* images.
*/
status = "disabled";
};

&ccm {
status = "disabled";
&sai1 {
rx-fifo-watermark = <48>;
tx-fifo-watermark = <2>;
fifo-depth = <48>;
rx-sync-mode = <1>;
status = "okay";
};

&esai0 {
fifo-depth = <96>;
/* note: not the same semantic as SAI TX watermark. For ESAI
* the DMA requests are generated when number of empty slots
* in the transmit FIFO reaches the chosen watermark value.
* In this case, DMA requests will be generated when transmit
* FIFO has 128 empty slots (equivalent to the FIFO having
* 2 words since the FIFO depth is 128 words).
*/
tx-fifo-watermark = <126>;
rx-fifo-watermark = <96>;
/* needed for internal CS42888 workaround. Remove when possible */
esai-clock-configuration = <ESAI_CLOCK_SCKR ESAI_CLOCK_INPUT>,
<ESAI_CLOCK_FSR ESAI_CLOCK_INPUT>;
status = "okay";
};

&edma0 {
status = "okay";
};
6 changes: 6 additions & 0 deletions app/boards/imx8qxp_mek_mimx8qx6_adsp.conf
Original file line number Diff line number Diff line change
Expand Up @@ -2,3 +2,9 @@ CONFIG_IMX8X=y
CONFIG_HAVE_AGENT=n
CONFIG_FORMAT_CONVERT_HIFI3=n
CONFIG_KPB_FORCE_COPY_TYPE_NORMAL=n
CONFIG_ZEPHYR_LOG=y
CONFIG_TRACE=n
CONFIG_DMA=y
CONFIG_DMA_NXP_EDMA_ENABLE_HALFMAJOR_IRQ=y
CONFIG_SHARED_INTERRUPTS=y
CONFIG_ZEPHYR_NATIVE_DRIVERS=y
42 changes: 33 additions & 9 deletions app/boards/imx8qxp_mek_mimx8qx6_adsp.overlay
Original file line number Diff line number Diff line change
Expand Up @@ -4,15 +4,39 @@
* SPDX-License-Identifier: Apache-2.0
*/

/* TODO: this is a temporary workaround the fact that
* currently the Linux kernel doesn't enable MU2's power.
* As such, CCM (and all IPs that depend on Zephyr's
* clock management) are not usable.
*/
&lpuart2 {
status = "disabled";
/ {
host_dma: dma {
compatible = "nxp,sof-host-dma";
dma-channels = <32>;
#dma-cells = <0>;
};
};

&sai1 {
rx-fifo-watermark = <48>;
tx-fifo-watermark = <2>;
fifo-depth = <48>;
rx-sync-mode = <1>;
status = "okay";
};

&esai0 {
fifo-depth = <96>;
/* note: not the same semantic as SAI TX watermark. For ESAI
* the DMA requests are generated when number of empty slots
* in transmit FIFO reaches the chosen watermark value.
* In this case, DMA requests will be generated when transmit
* FIFO has 126 empty slots (equivalent to the FIFO having
* 2 words since the FIFO depth is 128 words).
*/
tx-fifo-watermark = <126>;
rx-fifo-watermark = <96>;
/* needed for internal CS42888 workaround. Remove when possible */
esai-clock-configuration = <ESAI_CLOCK_SCKR ESAI_CLOCK_INPUT>,
<ESAI_CLOCK_FSR ESAI_CLOCK_INPUT>;
status = "okay";
};

&ccm {
status = "disabled";
&edma0 {
status = "okay";
};
4 changes: 4 additions & 0 deletions src/audio/dai-zephyr.c
Original file line number Diff line number Diff line change
Expand Up @@ -173,6 +173,10 @@ int dai_set_config(struct dai *dai, struct ipc_config_dai *common_config,
cfg.type = DAI_IMX_SAI;
cfg_params = &sof_cfg->sai;
break;
case SOF_DAI_IMX_ESAI:
cfg.type = DAI_IMX_ESAI;
cfg_params = &sof_cfg->esai;
break;
default:
return -EINVAL;
}
Expand Down
2 changes: 1 addition & 1 deletion src/drivers/imx/ipc.c
Original file line number Diff line number Diff line change
Expand Up @@ -33,7 +33,7 @@

LOG_MODULE_REGISTER(ipc_task, CONFIG_SOF_LOG_LEVEL);

#ifdef CONFIG_ARM64
#if defined(CONFIG_ARM64) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8X)
/* thanks to the fact that ARM's GIC is supported
* by Zephyr there's no need to clear interrupts
* explicitly. This should already be done by Zephyr
Expand Down
3 changes: 3 additions & 0 deletions src/lib/dai.c
Original file line number Diff line number Diff line change
Expand Up @@ -148,6 +148,9 @@ const struct device *zephyr_dev[] = {
#if CONFIG_DAI_NXP_SAI
DT_FOREACH_STATUS_OKAY(nxp_dai_sai, GET_DEVICE_LIST)
#endif
#if CONFIG_DAI_NXP_ESAI
DT_FOREACH_STATUS_OKAY(nxp_dai_esai, GET_DEVICE_LIST)
#endif
};

static const struct device *dai_get_zephyr_device(uint32_t type, uint32_t index)
Expand Down
2 changes: 0 additions & 2 deletions src/platform/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,6 @@ config IMX8
select IMX
select IMX_EDMA
select IMX_ESAI
select SCHEDULE_DMA_MULTI_CHANNEL
select IMX_INTERRUPT_IRQSTEER
help
Select if your target platform is imx8-compatible
Expand All @@ -84,7 +83,6 @@ config IMX8X
select IMX
select IMX_EDMA
select IMX_ESAI
select SCHEDULE_DMA_MULTI_CHANNEL
select IMX_INTERRUPT_IRQSTEER
help
Select if your target platform is imx8x-compatible
Expand Down
2 changes: 1 addition & 1 deletion src/platform/imx8/include/platform/platform.h
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@ struct timer;
#define LPSRAM_SIZE 16384

/* IPC Interrupt */
#define PLATFORM_IPC_INTERRUPT IRQ_NUM_MU
#define PLATFORM_IPC_INTERRUPT 7
#define PLATFORM_IPC_INTERRUPT_NAME NULL

/* Host page size */
Expand Down
14 changes: 0 additions & 14 deletions src/platform/imx8/platform.c
Original file line number Diff line number Diff line change
Expand Up @@ -160,11 +160,6 @@ int platform_init(struct sof *sof)
sof->cpu_timers = sof->platform_timer;
#endif

#ifdef __ZEPHYR__
/* initialize cascade interrupts before any usage */
interrupt_init(sof);
#endif

platform_interrupt_init();
platform_clock_init(sof);
scheduler_init_edf();
Expand All @@ -187,15 +182,6 @@ int platform_init(struct sof *sof)
if (ret < 0)
return -ENODEV;

/* Init EDMA platform domain */
sof->platform_dma_domain = dma_multi_chan_domain_init
(&sof->dma_info->dma_array[0], 1,
PLATFORM_DEFAULT_CLOCK, false);

/* i.MX platform DMA domain will be full synchronous, no time dependent */
sof->platform_dma_domain->full_sync = true;
scheduler_init_ll(sof->platform_dma_domain);

/* initialize the host IPC mechanims */
ipc_init(sof);

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -75,7 +75,7 @@ dnl period, priority, core, time_domain)
DAI_ADD(sof/pipe-dai-capture.m4,
1, SAI, 1, sai1-wm8960-hifi,
PIPELINE_SINK_1, 2, s32le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA)
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)

# PCM Low Latency, id 0

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -75,7 +75,7 @@ dnl period, priority, core, time_domain)
DAI_ADD(sof/pipe-dai-playback.m4,
1, SAI, 1, sai1-wm8960-hifi,
PIPELINE_SOURCE_1, 2, s32le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA)
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)

# PCM Low Latency, id 0

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -90,7 +90,7 @@ dnl period, priority, core, time_domain)
DAI_ADD(sof/pipe-dai-playback.m4,
1, SAI, 1, DAI_BE_NAME,
PIPELINE_SOURCE_1, 2, s32le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA)
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)


# PCM Low Latency, id 0
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -59,14 +59,14 @@ dnl period, priority, core, time_domain)
DAI_ADD(sof/pipe-dai-playback.m4,
1, ESAI, 0, esai0-cs42888,
PIPELINE_SOURCE_1, 2, s24le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA)
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)

# capture DAI is ESAI0 using 2 periods
# Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0
DAI_ADD(sof/pipe-dai-capture.m4,
2, ESAI, 0, esai0-cs42888,
PIPELINE_SINK_2, 2, s24le,
1000, 0, 0)
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)

# PCM Low Latency, id 0

Expand Down
4 changes: 2 additions & 2 deletions tools/topology/topology1/development/sof-imx8-src-wm8960.m4
Original file line number Diff line number Diff line change
Expand Up @@ -69,14 +69,14 @@ dnl period, priority, core, time_domain)
DAI_ADD(sof/pipe-dai-playback.m4,
1, SAI, SAI_INDEX, DAI_BE_NAME,
PIPELINE_SOURCE_1, 2, s32le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA)
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)

# capture DAI is SAI_SAI_INDEX using 2 periods
# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0
DAI_ADD(sof/pipe-dai-capture.m4,
2, SAI, SAI_INDEX, DAI_BE_NAME,
PIPELINE_SINK_2, 2, s32le,
1000, 0, 0)
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)


# PCM Low Latency, id 0
Expand Down
8 changes: 4 additions & 4 deletions tools/topology/topology1/sof-imx8-compr-wm8960-mixer.m4
Original file line number Diff line number Diff line change
Expand Up @@ -78,7 +78,7 @@ define(`DAI_BE_NAME', concat(concat(`sai', SAI_INDEX), STREAM_NAME))
DAI_ADD(sof/pipe-mixer-volume-dai-playback.m4,
1, SAI, SAI_INDEX, DAI_BE_NAME,
NOT_USED_IGNORED, 2, s32le,
1000, 1, 0, SCHEDULE_TIME_DOMAIN_DMA,
1000, 1, 0, SCHEDULE_TIME_DOMAIN_TIMER,
2, 48000)

# PCM Playback pipeline 3 on PCM 0 using max 2 channels of s32le.
Expand All @@ -88,7 +88,7 @@ PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4,
3, 0, 2, s32le,
1000, 0, 0,
48000, 48000, 48000,
SCHEDULE_TIME_DOMAIN_DMA,
SCHEDULE_TIME_DOMAIN_TIMER,
PIPELINE_PLAYBACK_SCHED_COMP_1)

# Compress Playback pipeline 4 on Compr 1 using max 2 channels of s32le.
Expand All @@ -98,7 +98,7 @@ PIPELINE_PCM_ADD(sof/pipe-host-codec-adapter-playback.m4,
4, 1, 2, s32le,
5000, 0, 0,
48000, 48000, 48000,
SCHEDULE_TIME_DOMAIN_DMA,
SCHEDULE_TIME_DOMAIN_TIMER,
PIPELINE_PLAYBACK_SCHED_COMP_1)

# Connect pipelines together
Expand All @@ -120,7 +120,7 @@ SectionGraph."PIPE_NAME" {
DAI_ADD(sof/pipe-dai-capture.m4,
2, SAI, SAI_INDEX, DAI_BE_NAME,
PIPELINE_SINK_2, 2, s32le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA)
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)


# PCM definitions
Expand Down
8 changes: 4 additions & 4 deletions tools/topology/topology1/sof-imx8-cs42888-mixer.m4
Original file line number Diff line number Diff line change
Expand Up @@ -46,7 +46,7 @@ PIPELINE_PCM_ADD(sof/pipe-low-latency-capture.m4,
DAI_ADD(sof/pipe-mixer-volume-dai-playback.m4,
1, ESAI, 0, esai0-cs42888,
NOT_USED_IGNORED, 2, s24le,
1000, 1, 0, SCHEDULE_TIME_DOMAIN_DMA,
1000, 1, 0, SCHEDULE_TIME_DOMAIN_TIMER,
2, 48000)

# PCM Playback pipeline 3 on PCM 0 using max 2 channels of s24le.
Expand All @@ -56,7 +56,7 @@ PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4,
3, 0, 2, s24le,
1000, 0, 0,
48000, 48000, 48000,
SCHEDULE_TIME_DOMAIN_DMA,
SCHEDULE_TIME_DOMAIN_TIMER,
PIPELINE_PLAYBACK_SCHED_COMP_1)

# PCM Playback pipeline 4 on PCM 1 using max 2 channels of s24le.
Expand All @@ -66,7 +66,7 @@ PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4,
4, 1, 2, s24le,
5000, 0, 0,
48000, 48000, 48000,
SCHEDULE_TIME_DOMAIN_DMA,
SCHEDULE_TIME_DOMAIN_TIMER,
PIPELINE_PLAYBACK_SCHED_COMP_1)

# Connect pipelines together
Expand All @@ -88,7 +88,7 @@ SectionGraph."PIPE_NAME" {
DAI_ADD(sof/pipe-dai-capture.m4,
2, ESAI, 0, esai0-cs42888,
PIPELINE_SINK_2, 2, s24le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA)
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)


# PCM definitions
Expand Down
4 changes: 2 additions & 2 deletions tools/topology/topology1/sof-imx8-cs42888.m4
Original file line number Diff line number Diff line change
Expand Up @@ -59,14 +59,14 @@ dnl period, priority, core, time_domain)
DAI_ADD(sof/pipe-dai-playback.m4,
1, ESAI, 0, esai0-cs42888,
PIPELINE_SOURCE_1, 2, s24le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA)
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)

# capture DAI is ESAI0 using 2 periods
# Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0
DAI_ADD(sof/pipe-dai-capture.m4,
2, ESAI, 0, esai0-cs42888,
PIPELINE_SINK_2, 2, s24le,
1000, 0, 0)
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)

# PCM Low Latency, id 0

Expand Down
2 changes: 1 addition & 1 deletion tools/topology/topology1/sof-imx8-nocodec-sai.m4
Original file line number Diff line number Diff line change
Expand Up @@ -52,7 +52,7 @@ dnl deadline, priority, core)
DAI_ADD(sof/pipe-dai-playback.m4,
1, SAI, 1, NoCodec-0,
PIPELINE_SOURCE_1, 2, s24le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA)
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)

dnl PCM_PLAYBACK_ADD(name, pcm_id, playback)

Expand Down
2 changes: 1 addition & 1 deletion tools/topology/topology1/sof-imx8-nocodec.m4
Original file line number Diff line number Diff line change
Expand Up @@ -52,7 +52,7 @@ dnl deadline, priority, core)
DAI_ADD(sof/pipe-dai-playback.m4,
1, ESAI, 0, NoCodec-0,
PIPELINE_SOURCE_1, 2, s24le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA)
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)

dnl PCM_PLAYBACK_ADD(name, pcm_id, playback)

Expand Down
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