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boards: ace30: fix SOF log level #9359

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abonislawski
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This will fix SOF logs build, previously INF log level was ON but at the same time log level OFF was ON

This will fix SOF logs build,
previously INF log level was ON but at the same time log level OFF

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
@kv2019i
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kv2019i commented Aug 13, 2024

@wszypelt @abonislawski Can you check the quickbuild fail, this would otherwise be good to merge now.

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this for some reason breaks ssp0 loopback

@ujfalusi ujfalusi self-requested a review August 13, 2024 10:11
@lgirdwood
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this for some reason breaks ssp0 loopback

Hmm, sounds like a race - have we isolated the "important" log messages needed for SSP yet ?

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kv2019i commented Aug 26, 2024

@ujfalusi @abonislawski update on this?

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@kv2019i, yes, this is good, the issue was in other place and a coincident

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kv2019i commented Aug 27, 2024

@wszypelt Can you check quickbuild?

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wszypelt commented Aug 27, 2024

@kv2019i quality issue in SRC at PTL_FPGA
test_01_04_src[24000-48000-32-2]
test_01_04_src[48000-16000-32-2]
Quality issues in 25% of audio: LowQuality (25% C1, 25% C2).
twice in a row

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kv2019i commented Aug 27, 2024

Ack @wszypelt thank you. @dnikodem can you take a look at above? Could be a perf issue when logs are enabled, so maybe we need to keep logs disabled in the overlay for FPGA.

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kv2019i commented Sep 5, 2024

Merged via #9436 instead.

@kv2019i kv2019i closed this Sep 5, 2024
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8 participants