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[MTL-007] port from main #75

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14 changes: 0 additions & 14 deletions drivers/power_domain/power_domain_intel_adsp.c
Original file line number Diff line number Diff line change
Expand Up @@ -9,10 +9,6 @@
#include <zephyr/pm/device_runtime.h>
#include <adsp_shim.h>

#if CONFIG_ACE_VERSION_1_5
#include <adsp_power.h>
#endif /* CONFIG_ACE_VERSION_1_5 */

#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(power_domain_intel_adsp, LOG_LEVEL_INF);

Expand All @@ -35,16 +31,6 @@ static int pd_intel_adsp_set_power_enable(struct pg_bits *bits, bool power_enabl
return -1;
}
} else {
#if CONFIG_ACE_VERSION_1_5
extern uint32_t g_key_read_holder;

if (bits->SPA_bit == INTEL_ADSP_HST_DOMAIN_BIT) {
volatile uint32_t* key_read_ptr = SRAM_TO_SRAM_ALIAS(&g_key_read_holder);
uint32_t key_value = *key_read_ptr;
if (key_value != INTEL_ADSP_ACE15_MAGIC_KEY)
return -1;
}
#endif
sys_write16(sys_read16((mem_addr_t)&ACE_DfPMCCU.dfpwrctl) & ~(SPA_bit_mask),
(mem_addr_t)&ACE_DfPMCCU.dfpwrctl);
}
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -98,10 +98,4 @@ static ALWAYS_INLINE bool soc_cpu_is_powered(int cpu_num)
*/
#define INTEL_ADSP_HST_DOMAIN_DEV DEVICE_DT_GET(INTEL_ADSP_HST_DOMAIN_DTNODE)

#define INTEL_ADSP_HST_DOMAIN_BIT DT_PROP(INTEL_ADSP_HST_DOMAIN_DTNODE, bit_position)

#define INTEL_ADSP_ACE15_MAGIC_KEY 0xFFFACE15

#define SRAM_TO_SRAM_ALIAS(address) ((__typeof__(address))((((uint32_t)(address)) & 0x1FFFFFFF) | 0x40000000))

#endif /* ZEPHYR_SOC_INTEL_ADSP_POWER_H_ */
19 changes: 6 additions & 13 deletions soc/xtensa/intel_adsp/ace/multiprocessing.c
Original file line number Diff line number Diff line change
Expand Up @@ -26,11 +26,6 @@

#define ACE_INTC_IRQ DT_IRQN(DT_NODELABEL(ace_intc))

#if CONFIG_ACE_VERSION_1_5
__attribute__((__aligned__(CONFIG_DCACHE_LINE_SIZE))) uint32_t g_key_read_holder;
__attribute__((__aligned__(CONFIG_DCACHE_LINE_SIZE))) unsigned alignment_dummy[0];
#endif /* CONFIG_ACE_VERSION_1_5 */

static void ipc_isr(void *arg)
{
uint32_t cpu_id = arch_proc_id();
Expand Down Expand Up @@ -85,18 +80,16 @@ void soc_mp_init(void)
IDC[i].agents[0].ipc.ctl = BIT(0); /* IPCTBIE */
}

int ret = pm_device_runtime_get(INTEL_ADSP_HST_DOMAIN_DEV);
ARG_UNUSED(ret);
__ASSERT(ret == 0, "HST power domain resume operation failed.");

/* Set the core 0 active */
soc_cpus_active[0] = true;
#if CONFIG_ACE_VERSION_1_5
g_key_read_holder = INTEL_ADSP_ACE15_MAGIC_KEY;
sys_cache_data_flush_range(&g_key_read_holder, sizeof(g_key_read_holder));
#endif /* CONFIG_ACE_VERSION_1_5 */
}

static int host_runtime_get(void)
{
return pm_device_runtime_get(INTEL_ADSP_HST_DOMAIN_DEV);
}
SYS_INIT(host_runtime_get, POST_KERNEL, 99);

#ifdef CONFIG_ADSP_IMR_CONTEXT_SAVE
/*
* Called after exiting D3 state when context restore is enabled.
Expand Down
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