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intel_adsp/ace: power: pad the hpsram_mask passed to power_down
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The power_down() function will lock dcache for the hpsram_mask
array. On some platforms, the dcache lock will fail if the array
is on cache line that can be used for window register context
saves.

Work around this by aligning and padding the hpsram_mask to cacheline
size.

Link: thesofproject/sof#9268
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
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kv2019i authored and tmleman committed Aug 5, 2024
1 parent 988e4cf commit 519ebc1
Showing 1 changed file with 6 additions and 4 deletions.
10 changes: 6 additions & 4 deletions soc/intel/intel_adsp/ace/power.c
Original file line number Diff line number Diff line change
Expand Up @@ -340,18 +340,20 @@ void pm_state_set(enum pm_state state, uint8_t substate_id)
sys_cache_data_flush_range((void *)imr_layout, sizeof(*imr_layout));
#endif /* CONFIG_ADSP_IMR_CONTEXT_SAVE */
#ifdef CONFIG_ADSP_POWER_DOWN_HPSRAM
/* This assumes a single HPSRAM segment */
static uint32_t hpsram_mask;
const int dcache_words = XCHAL_DCACHE_LINESIZE / sizeof(uint32_t);
uint32_t hpsram_mask[dcache_words] __aligned(XCHAL_DCACHE_LINESIZE);

hpsram_mask[0] = 0;
/* turn off all HPSRAM banks - get a full bitmap */
uint32_t ebb_banks = ace_hpsram_get_bank_count();
hpsram_mask = (1 << ebb_banks) - 1;
hpsram_mask[0] = (1 << ebb_banks) - 1;
#define HPSRAM_MASK_ADDR sys_cache_cached_ptr_get(&hpsram_mask)
#else
#define HPSRAM_MASK_ADDR NULL
#endif /* CONFIG_ADSP_POWER_DOWN_HPSRAM */
/* do power down - this function won't return */
ret = pm_device_runtime_put(INTEL_ADSP_HST_DOMAIN_DEV);
__ASSERT_NO_MSG(ret == 0);
/* do power down - this function won't return */
power_down(true, HPSRAM_MASK_ADDR, true);
} else {
power_gate_entry(cpu);
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