gtkwave
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SVUT is a simple framework to create Verilog/SystemVerilog unit tests. Just focus on your tests!
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Jun 29, 2024 - Python
Quickstart guide on Icarus Verilog.
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Jun 18, 2020 - Verilog
A place to keep my synthesizable verilog examples.
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Jul 10, 2023 - Verilog
A tool to invoke ghdl/gtkwave functions, including error highlighting
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Dec 30, 2022 - JavaScript
A completely functional encryption decryption model with specially generated Asymmetric key verification
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Jan 30, 2018 - Verilog
iverilog extension for Visual Studio Code to satisfy the needs for an easy testbench runner. Includes builtin GTKWave support.
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Mar 4, 2023 - TypeScript
VSDSquadron Research Internship 2024 program where we learn about RISC-V processor and VLSI Design using various open source tools.
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May 12, 2024 - C
Simulation platform that enables VHDL-style C++ coding. VCD generation for easy debug. VHDL code generation using C preprocessor. Simple risc-V rv32i SoC example, + Risc-V test suite and gcc bare-metal example. Linux (or WSL) / clang or gcc / risc-v toolchain / quartus required
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May 29, 2021 - C
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