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soc-verification

Here are 2 public repositories matching this topic...

akzare / HardORB

TCP/IP and UDP/IP protocol stack off-loading

fpga-accelerator tcpip-offloading soc-verification

Updated Aug 9, 2020
Verilog

williaml33moore / bathtub

BDD Gherkin implementation in native SystemVerilog, based on UVM.

asic fpga bdd bdd-specs rtl verilog systemverilog uvm verilog-hdl bdd-framework asic-verification design-verification asic-design rtl-design soc-design soc-verification uvm-verification

Updated Nov 16, 2024
SystemVerilog

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