GDSII File Parsing, IC Layout Analysis, and Parameter Extraction
parse
eda
vlsi
integrated-circuits
interconnect
gdsii
spef
electronic-design-automation
vlsi-circuits
-
Updated
Apr 23, 2023 - C++
GDSII File Parsing, IC Layout Analysis, and Parameter Extraction
A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).
A library to translate strings between common EDA naming conventions.
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