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vrstanchev/README.md
  • πŸ‘‹ Hi, I’m Veselin Stanchev
  • 🏒 working at TU-Plovdiv as Software Engineer, ICT DepartmΠ΅nt.
  • 🐧 My daily interest is to use open source tools only. Linux passion.
  • πŸ§‘β€πŸŽ“ Graduate Eng. MSc. Diploma work Grade: 5.00. Next target - PhD.
  • πŸ–±οΈ πŸ’» Current scientific status: pre-doctoral.
  • πŸ“–πŸ’» Professional field : Communication and Computer Technics 5.3 @ TU-Plovdiv, BG
  • πŸ§‘β€πŸŽ“πŸ“– PhD program : Computer Systems complexes and networks (CSCN). Full-time form.
  • πŸ’» PhD thesis theme -> Methods and Tools to develop a assembly-based operating system for embedded devices
  • πŸ’» I’m looking to collaborate on open source software.
  • πŸ–±οΈ πŸ“– Scientific field : Computer Architectures.
  • 🌱 I'm Learning to fly throught FightGear simulator civil single engine airplane ✈️
  • βœˆοΈπŸ“– Hobby -> Reading about and watching fighter jets
  • πŸ§‘β€πŸŽ“ PhD Research links :
  • "ResearchGate" "ORCID" "JITSI""Medium" "LinkedIn"
  • πŸ“Ί πŸ•ΆοΈ Stream -> Streaming educational programming content in English on Twitch. Note: To recieve notifications about the stream Join Discord
  • "Twitch""StreamElements" "Udemy""Skillshare" "Gmail""Threads" "YouTube" "Tiktok" "Discord"

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  1. Degrees Degrees Public

    Degrees

    Assembly 1

  2. Research-papers Research-papers Public

    Repo for my current and future research-papers

    Jupyter Notebook 1

  3. vrstanchevLab/ASMLab vrstanchevLab/ASMLab Public

    C/C++ and NASM x86 compatable assembly language educational materials

    Assembly 1

  4. LibrePCB-Projects LibrePCB-Projects Public

    LibrePCB Open-Source Hardware projects

    Assembly

  5. Stream-materials Stream-materials Public

    Materials from streams

    1

  6. VHDL-Designs VHDL-Designs Public

    Implementing VHDL logic with Free/FOSS/Libre tools for compilation and validation

    VHDL