- System-level FPGA Routing with Timing Division Multiplexing Technique
- Contest Link
- language: C++
- compiler: -std=c++11
- team: cada0030
- serial number: 5eb07cd6
- IP address: 140.110.214.87
- directory: /project/cad/cad07/final_test/cada0030
- src/ : source code directory
- src/main.cpp: main
- src/component.h & cpp: data structure for FPGA, nets, ....
- src/tdm.h & cpp: for file IO and manage for multiplexing algorithm
- ....
- input/ : released test cases
- output/: output result directory
- eval/: evaluator
$ cd src
$ make
$ cd ..
$ ./cada0030 <input> <output>
$ ./evaluaterFast <input> <output>
https://docs.google.com/spreadsheets/d/16-W2OZZZRlo_uKKbR1mh9Ab0Xff4AxLhppvCP39IYpM/edit?usp=sharing
https://drive.google.com/drive/folders/1oXdPK_5916hqx7mMWouMvtyvVqhHSo-C?usp=sharing