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ICCAD contest - System-level FPGA Routing with Timing Division Multiplexing Technique

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ICCAD-2019-ProblemB

  • System-level FPGA Routing with Timing Division Multiplexing Technique
  • Contest Link
  • language: C++
  • compiler: -std=c++11

Team Info

  • team: cada0030
  • serial number: 5eb07cd6
  • IP address: 140.110.214.87
  • directory: /project/cad/cad07/final_test/cada0030

Structure

  • src/ : source code directory
  • src/main.cpp: main
  • src/component.h & cpp: data structure for FPGA, nets, ....
  • src/tdm.h & cpp: for file IO and manage for multiplexing algorithm
  • ....
  • input/ : released test cases
  • output/: output result directory
  • eval/: evaluator

Compile

$ cd src
$ make
$ cd ..

Run

$ ./cada0030 <input> <output>

Evaluation

$ ./evaluaterFast <input> <output>

Result

https://docs.google.com/spreadsheets/d/16-W2OZZZRlo_uKKbR1mh9Ab0Xff4AxLhppvCP39IYpM/edit?usp=sharing

Figure

https://drive.google.com/drive/folders/1oXdPK_5916hqx7mMWouMvtyvVqhHSo-C?usp=sharing

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ICCAD contest - System-level FPGA Routing with Timing Division Multiplexing Technique

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