Fixes for Xilinx Zynq UltraScale+ MPSoC #499
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* Fixes to support wolfBoot native make and gcc-arm cross compiler. ZD 18159 * Adjust wolfBoot linker script to not use 0 base, instead use end of DDR - 1MB. * Fixed QSPI bare-metal driver for multi-sector and read return code. * Fixed issue with Xilinx XMSS IMAGE_HEADER_SIZE in documentation. It should be 5000 bytes. * Performance optimizations for QSPI: - Allow configuration of SPI clock. - Improve GSPI FIFO TX/RX fill. * Added support for FAST_MEMCPY that supports an aligned 32-bit. * Added Flattened uImage Tree (FIT) image (FDT format). * Added Aarch64 support for FDT fixups. * Added Aarch64 startup to support EL2 with cache/MMU. * Added documentation about exception levels * Moved zynqmp registers to header. * Fix printf uart_writenum "buf" len. * Updated fdt-parser to support saving off larger data images.
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…from 18,228ms to 2,607ms. Changed QSPI to use DMA by default (can force IO mode using `GQSPI_MODE_IO`).
…Remove unused variable.
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GQSPI_MODE_IO.