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Add SOC overlay for the 2 DSP of NXP i.MXRT700 #31

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merged 2 commits into from
Oct 23, 2024

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iuliana-prodan
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The i.MX RT700 has a Compute Subsystem which includes a primary ARM Cortex-M33 running at 325 MHz and Cadence Tensilica HiFi 4 DSP.
It also features an ultra-low power Sense Subsystem which includes a second ARM Cortex-M33 and Cadence Tensilica HiFi 1 DSP.

This pull request adds the SOC overlay for HiFi1 and HiFi4 cores.

@iuliana-prodan
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@nashif @dcpleung can you please have a look on this?

@dcpleung
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Could you remove the key.h files in both commits?

@iuliana-prodan
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Could you remove the key.h files in both commits?

I removed them.

@iuliana-prodan
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Could you remove the key.h files in both commits?

I removed them.

@dcpleung I have no idea how to fix the CI failure: https://github.com/zephyrproject-rtos/hal_xtensa/actions/runs/11488673050/job/31975891667?pr=31#step:1:36 :(

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#32 is fixing that.

@iuliana-prodan
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#32 is fixing that.

Great, thank you!

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That is just merged. Could you rebase? That should allow CI to run.

Add the SoC layer for i.MXRT700 Hifi4 DSP core,
used with board mimxrt700_evk/mimxrt798s/hifi4.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Add the SoC layer for i.MXRT700 HiFi1 DSP core,
used with board mimxrt700_evk/mimxrt798s/hifi1.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
@dcpleung dcpleung merged commit b38620c into zephyrproject-rtos:master Oct 23, 2024
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2 participants