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[topic-clang] Add LLVM RISC-V multi-libs #839
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[topic-clang] Add LLVM RISC-V multi-libs #839
stephanosio
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Nov 26, 2024
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This commit pulls the LLVM patch that enables `multilib.yaml` support for the RISC-V architecture. Note that the hard-coded RISC-V multi-lib selection logic was unconditionally used prior to this patch. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
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Add RISC-V multi-libs
[topic-clang] Add LLVM RISC-V multi-libs
Nov 25, 2024
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This commit adds the following "common" RV32I multi-lib variants, based on the list of the GCC RV32I multi-libs (gcc/config/riscv/t-zephyr): rv32i_zicsr_zifencei/ilp32 rv32im_zicsr_zifencei/ilp32 rv32im_zicsr_zifencei_zba_zbb_zbc_zbs/ilp32 rv32imac_zicsr_zifencei/ilp32 rv32imafc_zicsr_zifencei/ilp32f rv32imfc_zicsr_zifencei/ilp32f rv32imafd_zicsr_zifencei/ilp32d rv32if_zicsr_zifencei/ilp32f Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds the following "common" RV32E multi-lib variants, based on the list of the GCC RV32E multi-libs (gcc/config/riscv/t-zephyr): rv32e_zicsr_zifencei/ilp32e rv32em_zicsr_zifencei/ilp32e rv32emc_zicsr_zifencei/ilp32e rv32emc_zicsr_zifencei_zba_zbb_zbc_zbs/ilp32e rv32emc_zicsr/ilp32e rv32emc_zicsr_zba_zbb_zbc_zbs/ilp32e Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds the following "common" RV64I multi-lib variants, based on the list of the GCC RV64I multi-libs (gcc/config/riscv/t-zephyr): rv64i_zicsr_zifencei/lp64 rv64im_zicsr_zifencei/lp64 rv64im_zicsr_zifencei_zba_zbb_zbc_zbs/lp64 rv64imac_zicsr_zifencei/lp64 rv64imac_zicsr_zifencei_zba_zbb_zbc_zbs/lp64 rv64imafdc_zicsr_zifencei/lp64d rv64imafd_zicsr_zifencei/lp64d rv64imfc_zicsr_zifencei/lp64f rv64imfc_zicsr_zifencei_zba_zbb_zbc_zbs/lp64f Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
LLVM compiler-rt does not currently support exceptions and rounding modes for computations on the types that are emulated in software. For more details, refer to the GitHub issue zephyrproject-rtos#838. Revert this commit when this issue is fixed in the compiler-rt. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
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This commit updates the CMake target specification to handle the RISC-V architecture. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds the alternate RV32I multi-lib mappings, based on the list of the GCC RV32I multi-lib mappings (gcc/config/riscv/t-zephyr). Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds the alternate RV32E multi-lib mappings, based on the list of the GCC RV32E multi-lib mappings (gcc/config/riscv/t-zephyr). Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Initial test build available at https://github.com/zephyrproject-rtos/sdk-ng/actions/runs/12003727847?pr=839 |
This commit adds the alternate RV64I multi-lib mappings, based on the list of the GCC RV64I multi-lib mappings (gcc/config/riscv/t-zephyr). Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
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Add RV32I, RV32E and RV64I "common" multi-libs, based on the list of Zephyr GCC RISC-V multi-libs.