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arch: aarch32: place .bss, .noinit sections at the end of the binary
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This is a follow up to #53262, which still lacked the adjustment of the
.noinit section's position within the binary by the time the PR went
stale.

Adjust the linker command file so that the .bss and .noinit sections
are placed at the end of the resulting binary. Until now, those sections
have been located somewhere in the middle of the binary, so that the
inclusion of structures like statically defined heaps or large zero-
initialized arrays reflected 1:1 in the resulting binary's size. Even
for a stripped binary, such data was included in full as the linker
couldn't omit it due to subsequent sections within the binary.

This fix has been tested with a 32 MB statically allocated heap and
a 32 MB uint8 zero-initialized array. Both structures are clearly
identifyable in the memory consumption statistics, however, the final
binary's size is unaffected by their inclusion.

Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
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ibirnbaum committed Aug 6, 2023
1 parent ad0f2a6 commit 07711cb
Showing 1 changed file with 32 additions and 30 deletions.
62 changes: 32 additions & 30 deletions include/zephyr/arch/arm/aarch32/cortex_a_r/scripts/linker.ld
Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,13 @@
#endif
#define RAMABLE_REGION RAM

/* section alignment directive, valid only if not running in XIP mode */
#ifndef CONFIG_XIP
#define SECTION_ALIGN ALIGN(_region_min_align)
#else
#define SECTION_ALIGN
#endif

#if !defined(CONFIG_XIP) && (CONFIG_FLASH_SIZE == 0)
#define ROM_ADDR RAM_ADDR
#else
Expand Down Expand Up @@ -73,8 +80,6 @@ _region_min_align = 4;
. = ALIGN(_region_min_align)
#endif

#define BSS_ALIGN ALIGN(_region_min_align)

MEMORY
{
FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE
Expand Down Expand Up @@ -266,35 +271,10 @@ SECTIONS
_app_smem_rom_start = LOADADDR(_APP_SMEM_SECTION_NAME);
#endif /* CONFIG_USERSPACE */

SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD), BSS_ALIGN)
{
/*
* For performance, BSS section is assumed to be 4 byte aligned and
* a multiple of 4 bytes
*/
. = ALIGN(4);
__bss_start = .;
__kernel_ram_start = .;

*(.bss)
*(".bss.*")
*(COMMON)
*(".kernel_bss.*")

#ifdef CONFIG_CODE_DATA_RELOCATION
#include <linker_sram_bss_relocate.ld>
#endif

/*
* As memory is cleared in words only, it is simpler to ensure the BSS
* section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
*/
__bss_end = ALIGN(4);
} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)

#include <zephyr/linker/common-noinit.ld>
. = ALIGN(_region_min_align);
__kernel_ram_start = .;

SECTION_DATA_PROLOGUE(_DATA_SECTION_NAME,,)
SECTION_DATA_PROLOGUE(_DATA_SECTION_NAME,,SECTION_ALIGN)
{
__data_region_start = .;
__data_start = .;
Expand Down Expand Up @@ -328,7 +308,29 @@ SECTIONS
#include <snippets-data-sections.ld>

__data_region_end = .;
. = ALIGN(_region_min_align);

SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD), SECTION_ALIGN)
{
__bss_start = .;

*(.bss)
*(".bss.*")
*(COMMON)
*(".kernel_bss.*")

#ifdef CONFIG_CODE_DATA_RELOCATION
#include <linker_sram_bss_relocate.ld>
#endif

/*
* As memory is cleared in words only, it is simpler to ensure the BSS
* section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
*/
__bss_end = ALIGN(4);
} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)

#include <zephyr/linker/common-noinit.ld>

/* Define linker symbols */

Expand Down

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