drivers: spi: spi_nrfx_spim: Add CPOL handling on SCK pin

Pin state after SPIM deinitialization is based on pinctrl configuration.
On the other hand, CPOL is set during runtime. With the introduction
of the power-optimized SPIM driver, it disables the peripheral instance
once the transfer is completed.
As a result, the GPIO takes control over the SCK pin and drives it
based on pinctrl configuration which causes an invalid SCK state
when the transaction is configured with CPOL (Clock Polarity).

To address this issue, a patch was introduced to the SPIM driver.
Now, when a SPIM instance is configured with CPOL,
the driver is setting in the runtime the correct state of the SCK pin.

Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>

drivers/spi/spi_nrfx_spim.c

@@ -13,6 +13,7 @@
 #include <nrfx_ppi.h>
 #endif
 #include <nrfx_spim.h>
+#include <hal/nrf_gpio.h>
 #include <hal/nrf_clock.h>
 #include <string.h>
 #include <zephyr/linker/devicetree_regions.h>
@@ -181,6 +182,9 @@ static int configure(const struct device *dev,
 	config.mode      = get_nrf_spim_mode(spi_cfg->operation);
 	config.bit_order = get_nrf_spim_bit_order(spi_cfg->operation);
 
+	nrf_gpio_pin_write(nrfy_spim_sck_pin_get(dev_config->spim.p_reg),
+			   spi_cfg->operation & SPI_MODE_CPOL ? 1 : 0);
+
 	if (dev_data->initialized) {
 		nrfx_spim_uninit(&dev_config->spim);
 		dev_data->initialized = false;