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boards: dptechnics: Add support for Walter board
Add board definitions for the DPTechnics Walter board. Signed-off-by: Thibo Verheyde <thibo@dptechnics.com>
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.. _boards-dptechnics: | ||
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DPTechnics | ||
########## | ||
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.. toctree:: | ||
:maxdepth: 1 | ||
:glob: | ||
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**/* |
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# Copyright (c) 2024 DPTechnics bv | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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if BOARD_WALTER_ESP32S3_PROCPU | ||
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config HEAP_MEM_POOL_ADD_SIZE_BOARD | ||
int | ||
default 65535 if WIFI && BT | ||
default 51200 if WIFI | ||
default 40960 if BT | ||
default 4096 | ||
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endif # BOARD_WALTER_ESP32S3_PROCPU | ||
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if BOARD_WALTER_ESP32S3_APPCPU | ||
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config HEAP_MEM_POOL_ADD_SIZE_BOARD | ||
default 256 | ||
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endif # BOARD_WALTER_ESP32S3_APPCPU |
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# Copyright (c) 2024 DPTechnics bv | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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choice BOOTLOADER | ||
default BOOTLOADER_MCUBOOT | ||
endchoice | ||
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choice BOOT_SIGNATURE_TYPE | ||
default BOOT_SIGNATURE_TYPE_NONE | ||
endchoice |
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# Copyright (c) 2024 DPTechnics bv | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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config BOARD_WALTER | ||
select SOC_ESP32S3_WROOM_N16R2 | ||
select SOC_ESP32S3_PROCPU if BOARD_WALTER_ESP32S3_PROCPU | ||
select SOC_ESP32S3_APPCPU if BOARD_WALTER_ESP32S3_APPCPU |
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# SPDX-License-Identifier: Apache-2.0 | ||
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if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") | ||
set(OPENOCD OPENOCD-NOTFOUND) | ||
endif() | ||
find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) | ||
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include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) | ||
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) |
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board: | ||
name: walter | ||
vendor: dptechnics | ||
socs: | ||
- name: esp32s3 |
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.. _walter: | ||
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DPTechnics Walter | ||
################# | ||
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Overview | ||
******** | ||
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Walter is a compact IoT development board that combines an Espressif ESP32-S3 SoC | ||
with a Sequans Monarch 2 GM02SP LTE-M/NB-IoT/GNSS modem. | ||
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For more information about Walter, see these references: | ||
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- `datasheet`_ | ||
- `schematic`_ | ||
- `KiCAD footprint`_ | ||
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.. figure:: img/walter.webp | ||
:align: center | ||
:alt: DPTechnics Walter board | ||
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DPTechnics Walter board (Credit: DPTechnics bv) | ||
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Hardware | ||
******** | ||
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ESP32-S3-WROOM-1-N16R2 microcontroller: | ||
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- Xtensa dual-core 32-bit LX7 CPU | ||
- 16 MiB quad SPI flash memory | ||
- 2 MiB quad SPI PSRAM | ||
- 150 Mbps 802.11 b/g/n Wi-Fi 4 with on-board PCB antenna | ||
- 2 Mbps Bluetooth 5 Low Energy with on-board PCB antenna | ||
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Sequans Monarch 2 GM02SP modem: | ||
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- Dual-mode LTE-M / NB-IoT (NB1, NB2) | ||
- 3GPP LTE release 14 (Upgradable up to release 17) | ||
- Ultra-low, deep-sleep mode in eDRX and PSM | ||
- Adaptive +23 dBm, +20 dBm and +14 dBm output power | ||
- Integrated LNA and SAW filter for GNSS reception | ||
- Assisted and non-assisted GNSS with GPS and Galileo constellations | ||
- Integrated SIM card | ||
- Nano-SIM card slot | ||
- u.FL RF connectors for GNSS and 5G antennas | ||
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Inputs & outputs: | ||
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- 24 GPIO pins for application use | ||
- UART, SPI, I²C, CAN, I²S, and SD available on any of the GPIO pins | ||
- ADC, DAC, and PWM integrated in ESP32-S3 | ||
- 3.3 V software-controllable output | ||
- USB Type-C connector for flashing and debugging | ||
- 22 test points for production programming and testing | ||
- On-board reset button | ||
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Power supply | ||
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- 5.0 V via USB Type-C | ||
- 3.0 - 5.5 V via Vin pin | ||
- Not allowed to use both power inputs simultaneously | ||
- Designed for extremely low quiescent current | ||
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Form factor | ||
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- Easy to integrate via 2.54 mm headers | ||
- 55 mm x 24.8 mm board dimensions | ||
- Pin and footprint compatible with EOL Pycom GPy | ||
- Breadboard friendly | ||
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Supported Features | ||
================== | ||
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Current Zephyr's Walter board supports the following features: | ||
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+------------+------------+-------------------------------------+ | ||
| Interface | Controller | Driver/Component | | ||
+============+============+=====================================+ | ||
| UART | on-chip | serial port | | ||
+------------+------------+-------------------------------------+ | ||
| GPIO | on-chip | gpio | | ||
+------------+------------+-------------------------------------+ | ||
| PINMUX | on-chip | pinmux | | ||
+------------+------------+-------------------------------------+ | ||
| USB-JTAG | on-chip | hardware interface | | ||
+------------+------------+-------------------------------------+ | ||
| SPI Master | on-chip | spi | | ||
+------------+------------+-------------------------------------+ | ||
| TWAI/CAN | on-chip | can | | ||
+------------+------------+-------------------------------------+ | ||
| ADC | on-chip | adc | | ||
+------------+------------+-------------------------------------+ | ||
| Timers | on-chip | counter | | ||
+------------+------------+-------------------------------------+ | ||
| Watchdog | on-chip | watchdog | | ||
+------------+------------+-------------------------------------+ | ||
| TRNG | on-chip | entropy | | ||
+------------+------------+-------------------------------------+ | ||
| LEDC | on-chip | pwm | | ||
+------------+------------+-------------------------------------+ | ||
| MCPWM | on-chip | pwm | | ||
+------------+------------+-------------------------------------+ | ||
| PCNT | on-chip | qdec | | ||
+------------+------------+-------------------------------------+ | ||
| GDMA | on-chip | dma | | ||
+------------+------------+-------------------------------------+ | ||
| USB-CDC | on-chip | serial | | ||
+------------+------------+-------------------------------------+ | ||
| RADIO | on-board | modem_cellular | | ||
+------------+------------+-------------------------------------+ | ||
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Prerequisites | ||
------------- | ||
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Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command | ||
below to retrieve those files. | ||
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.. code-block:: console | ||
west blobs fetch hal_espressif | ||
.. note:: | ||
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It is recommended running the command above after :file:`west update`. | ||
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Building & Flashing | ||
******************* | ||
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Simple boot | ||
=========== | ||
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The board could be loaded using the single binary image, without 2nd stage bootloader. | ||
It is the default option when building the application without additional configuration. | ||
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.. note:: | ||
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Simple boot does not provide any security features nor OTA updates. | ||
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MCUboot bootloader | ||
================== | ||
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User may choose to use MCUboot bootloader instead. In that case the bootloader | ||
must be build (and flash) at least once. | ||
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There are two options to be used when building an application: | ||
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1. Sysbuild | ||
2. Manual build | ||
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.. note:: | ||
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User can select the MCUboot bootloader by adding the following line | ||
to the board default configuration file. | ||
``` | ||
CONFIG_BOOTLOADER_MCUBOOT=y | ||
``` | ||
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Sysbuild | ||
======== | ||
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The sysbuild makes possible to build and flash all necessary images needed to | ||
bootstrap the board with the ESP32-S3 SoC. | ||
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To build the sample application using sysbuild use the command: | ||
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.. zephyr-app-commands:: | ||
:tool: west | ||
:app: samples/hello_world | ||
:board: walter/esp32s3/procpu | ||
:goals: build | ||
:west-args: --sysbuild | ||
:compact: | ||
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By default, the ESP32 sysbuild creates bootloader (MCUboot) and application | ||
images. But it can be configured to create other kind of images. | ||
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Build directory structure created by sysbuild is different from traditional | ||
Zephyr build. Output is structured by the domain subdirectories: | ||
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.. code-block:: | ||
build/ | ||
├── hello_world | ||
│ └── zephyr | ||
│ ├── zephyr.elf | ||
│ └── zephyr.bin | ||
├── mcuboot | ||
│ └── zephyr | ||
│ ├── zephyr.elf | ||
│ └── zephyr.bin | ||
└── domains.yaml | ||
.. note:: | ||
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With ``--sysbuild`` option the bootloader will be re-build and re-flash | ||
every time the pristine build is used. | ||
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For more information about the system build please read the :ref:`sysbuild` documentation. | ||
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Manual build | ||
============ | ||
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During the development cycle, it is intended to build & flash as quickly possible. | ||
For that reason, images can be build one at a time using traditional build. | ||
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The instructions following are relevant for both manual build and sysbuild. | ||
The only difference is the structure of the build directory. | ||
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.. note:: | ||
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Remember that bootloader (MCUboot) needs to be flash at least once. | ||
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Build and flash applications as usual (see :ref:`build_an_application` and | ||
:ref:`application_run` for more details). | ||
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.. zephyr-app-commands:: | ||
:zephyr-app: samples/hello_world | ||
:board: walter/esp32s3/procpu | ||
:goals: build | ||
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The usual ``flash`` target will work with the ``walter`` board | ||
configuration. Here is an example for the :ref:`hello_world` | ||
application. | ||
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.. zephyr-app-commands:: | ||
:zephyr-app: samples/hello_world | ||
:board: walter/esp32s3/procpu | ||
:goals: flash | ||
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Open the serial monitor using the following command: | ||
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.. code-block:: shell | ||
west espressif monitor | ||
After the board has automatically reset and booted, you should see the following | ||
message in the monitor: | ||
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.. code-block:: console | ||
***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** | ||
Hello World! walter/esp32s3/procpu | ||
Debugging | ||
********* | ||
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ESP32-S3 support on OpenOCD is available upstream as of version 0.12.0. | ||
Download and install OpenOCD from `OpenOCD`_. | ||
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ESP32-S3 has a built-in JTAG circuitry and can be debugged without any additional chip. Only an USB cable connected to the D+/D- pins is necessary. | ||
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Further documentation can be obtained from the SoC vendor in `JTAG debugging | ||
for ESP32-S3`_. | ||
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Here is an example for building the :ref:`hello_world` application. | ||
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.. zephyr-app-commands:: | ||
:zephyr-app: samples/hello_world | ||
:board: walter/esp32s3/procpu | ||
:goals: build flash | ||
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You can debug an application in the usual way. Here is an example for the :ref:`hello_world` application. | ||
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.. zephyr-app-commands:: | ||
:zephyr-app: samples/hello_world | ||
:board: walter/esp32s3/procpu | ||
:goals: debug | ||
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.. _`JTAG debugging for ESP32-S3`: | ||
https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-guides/jtag-debugging/ | ||
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.. _`OpenOCD`: | ||
https://github.com/openocd-org/openocd | ||
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References | ||
********** | ||
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.. target-notes:: | ||
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.. _`schematic`: | ||
https://github.com/QuickSpot/walter-hardware/tree/main/walter/schematic | ||
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.. _`KiCAD footprint`: | ||
https://github.com/QuickSpot/walter-hardware/tree/main/walter/footprint | ||
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.. _`datasheet`: | ||
https://www.quickspot.io/datasheet/walter_datasheet.pdf |
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set ESP_RTOS none | ||
set ESP32_ONLYCPU 1 | ||
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# Source the JTAG interface configuration file | ||
source [find interface/esp_usb_jtag.cfg] | ||
# Source the ESP32-S3 configuration file | ||
source [find target/esp32s3.cfg] |
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