riscv: support dumping privilege stack during coredump

Adds some bits to enable dumping privilege stack during
coredump.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>

arch/Kconfig

@@ -115,6 +115,7 @@ config RISCV
  bool
  select ARCH_IS_SET
  select ARCH_SUPPORTS_COREDUMP
+ select ARCH_SUPPORTS_COREDUMP_PRIV_STACKS
  select ARCH_SUPPORTS_ROM_START if !SOC_FAMILY_ESPRESSIF_ESP32
  select ARCH_SUPPORTS_EMPTY_IRQ_SPURIOUS
  select ARCH_HAS_CODE_DATA_RELOCATION

arch/riscv/core/coredump.c

@@ -5,6 +5,7 @@
  */
 
 #include <string.h>
+#include <zephyr/kernel.h>
 #include <zephyr/debug/coredump.h>
 
 #ifndef CONFIG_64BIT
@@ -116,3 +117,21 @@ uint16_t arch_coredump_tgt_code_get(void)
 {
  return COREDUMP_TGT_RISC_V;
 }
+
+#if defined(CONFIG_DEBUG_COREDUMP_DUMP_THREAD_PRIV_STACK)
+void arch_coredump_priv_stack_dump(struct k_thread *thread)
+{
+ uintptr_t start_addr, end_addr;
+
+ start_addr = thread->arch.priv_stack_start;
+
+ if (start_addr == 0U) {
+ return;
+ }
+
+ start_addr += Z_RISCV_STACK_GUARD_SIZE;
+ end_addr = start_addr + Z_STACK_PTR_ALIGN(CONFIG_PRIVILEGED_STACK_SIZE);
+
+ coredump_memory_dump(start_addr, end_addr);
+}
+#endif /* CONFIG_DEBUG_COREDUMP_DUMP_THREAD_PRIV_STACK */