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soc: lpc55s3x: Enable VREF
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Add node for VREF0 peripheral to LPC55S3X SOC DT

Clock VREF peripheral if status = okay in DT

Enable VREF on lpcxpresso55s36

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
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decsny committed Jul 6, 2023
1 parent 874236d commit 8526af4
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Showing 3 changed files with 22 additions and 18 deletions.
4 changes: 4 additions & 0 deletions boards/arm/lpcxpresso55s36/lpcxpresso55s36.dts
Original file line number Diff line number Diff line change
Expand Up @@ -168,3 +168,7 @@ zephyr_udc0: &usbfs {
pinctrl-0 = <&pinmux_usbfs>;
pinctrl-names = "default";
};

&vref0 {
status = "okay";
};
9 changes: 9 additions & 0 deletions dts/arm/nxp/nxp_lpc55S3x_common.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -389,6 +389,15 @@
prescaler = <2>;
#pwm-cells = <3>;
};

vref0: vref@b5000 {
compatible = "nxp,vref";
regulator-name = "lpc55s36-vref";
reg = <0xb5000 0x30>;
status = "disabled";
nxp,buffer-startup-delay-us = <400>;
nxp,bandgap-startup-time-us = <20>;
};
};

&nvic {
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27 changes: 9 additions & 18 deletions soc/arm/nxp_lpc/lpc55xxx/soc.c
Original file line number Diff line number Diff line change
@@ -1,5 +1,4 @@
/*
* Copyright 2017, 2019-2023 NXP
/* Copyright 2017, 2019-2023 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
Expand Down Expand Up @@ -261,28 +260,20 @@ DT_FOREACH_STATUS_OKAY(nxp_lpc_ctimer, CTIMER_CLOCK_SETUP)
#if defined(CONFIG_SOC_LPC55S36)
CLOCK_SetClkDiv(kCLOCK_DivAdc0Clk, 2U, true);
CLOCK_AttachClk(kFRO_HF_to_ADC0);

#if defined(CONFIG_ADC_MCUX_LPADC)
/* Vref is required for LPADC reference */
POWER_DisablePD(kPDRUNCFG_PD_VREF);

vref_config_t vrefConfig;

VREF_GetDefaultConfig(&vrefConfig);
vrefConfig.bufferMode = kVREF_ModeHighPowerBuffer;
vrefConfig.enableInternalVoltageRegulator = true;
vrefConfig.enableVrefOut = true;
VREF_Init((VREF_Type *)VREF_BASE, &vrefConfig);
#endif
#else
#else /* not LPC55s36 */
CLOCK_SetClkDiv(kCLOCK_DivAdcAsyncClk,
DT_PROP(DT_NODELABEL(adc0), clk_divider), true);
CLOCK_AttachClk(MUX_A(CM_ADCASYNCCLKSEL, DT_PROP(DT_NODELABEL(adc0), clk_source)));

/* Power up the ADC */
POWER_DisablePD(kPDRUNCFG_PD_LDOGPADC);
#endif
#endif
#endif /* platform specific code */
#endif /* DT has adc0 */

#if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(vref0), nxp_vref, okay))
CLOCK_EnableClock(kCLOCK_Vref);
POWER_DisablePD(kPDRUNCFG_PD_VREF);
#endif /* vref0 */
}

/**
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