drivers: flash: Initial support QSPI Flash driver for Renesas RA6

Add support for QSPI Flash driver running on Renesas EK_RA6M5, EK_RA6M4, EK_RA6M3 and EK_RA6E2. Signed-off-by: Tri Nguyen <tri.nguyen.wj@bp.renesas.com> Signed-off-by: Thao Luong <thao.luong.uw@renesas.com>
zephyrproject-rtos · Oct 11, 2024 · 90297b6 · 90297b6
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diff --git a/boards/renesas/ek_ra6e2/doc/index.rst b/boards/renesas/ek_ra6e2/doc/index.rst
@@ -98,6 +98,8 @@ The below features are currently supported on Zephyr OS for EK-RA6E2 board:
 +-----------+------------+----------------------+
 | CLOCK     | on-chip    | clock control        |
 +-----------+------------+----------------------+
+| QSPI      | on-chip    | qspi flash           |
++-----------+------------+----------------------+
 
 Other hardware features are currently not supported by the port.
 

diff --git a/boards/renesas/ek_ra6e2/ek_ra6e2-pinctrl.dtsi b/boards/renesas/ek_ra6e2/ek_ra6e2-pinctrl.dtsi
@@ -11,4 +11,16 @@
 			<RA_PSEL(RA_PSEL_SCI_0, 4, 10)>;
 		};
 	};
+
+	qspi_default: qspi_default {
+		group1 {
+			/* QSPICLK QSSL QIO0 QIO1 QIO2 QIO3 */
+			psels = <RA_PSEL(RA_PSEL_QSPI, 1, 0)>,
+			<RA_PSEL(RA_PSEL_QSPI, 1, 12)>,
+			<RA_PSEL(RA_PSEL_QSPI, 1, 2)>,
+			<RA_PSEL(RA_PSEL_QSPI, 1, 1)>,
+			<RA_PSEL(RA_PSEL_QSPI, 1, 4)>,
+			<RA_PSEL(RA_PSEL_QSPI, 1, 3)>;
+		};
+	};
 };
diff --git a/boards/renesas/ek_ra6e2/ek_ra6e2.dts b/boards/renesas/ek_ra6e2/ek_ra6e2.dts
@@ -99,3 +99,17 @@
 	mul = <10 0>;
 	status = "okay";
 };
+
+&qspi0 {
+	pinctrl-0 = <&qspi_default>;
+	pinctrl-names = "default";
+	status = "okay";
+	at25sf128a: ra-qspi-nor@60000000 {
+		compatible = "renesas,ra-qspi-nor";
+		reg = <0x60000000 DT_SIZE_M(16)>;
+		size = <DT_SIZE_M(16)>;
+		status = "okay";
+		write-block-size = <1>;
+		erase-block-size = <4096>;
+	};
+};
diff --git a/boards/renesas/ek_ra6m3/doc/index.rst b/boards/renesas/ek_ra6m3/doc/index.rst
@@ -96,6 +96,8 @@ The below features are currently supported on Zephyr OS for EK-RA6M3 board:
 +-----------+------------+----------------------+
 | CLOCK     | on-chip    | clock control        |
 +-----------+------------+----------------------+
+| QSPI      | on-chip    | qspi flash           |
++-----------+------------+----------------------+
 
 Other hardware features are currently not supported by the port.
 

diff --git a/boards/renesas/ek_ra6m3/ek_ra6m3-pinctrl.dtsi b/boards/renesas/ek_ra6m3/ek_ra6m3-pinctrl.dtsi
@@ -11,4 +11,16 @@
 			<RA_PSEL(RA_PSEL_SCI_8, 1, 4)>;
 		};
 	};
+
+	qspi_default: qspi_default {
+		group1 {
+			/* QSPICLK QSSL QIO0 QIO1 QIO2 QIO3 */
+			psels = <RA_PSEL(RA_PSEL_QSPI, 3, 5)>,
+			<RA_PSEL(RA_PSEL_QSPI, 3, 6)>,
+			<RA_PSEL(RA_PSEL_QSPI, 3, 7)>,
+			<RA_PSEL(RA_PSEL_QSPI, 3, 8)>,
+			<RA_PSEL(RA_PSEL_QSPI, 3, 9)>,
+			<RA_PSEL(RA_PSEL_QSPI, 3, 10)>;
+		};
+	};
 };
diff --git a/boards/renesas/ek_ra6m3/ek_ra6m3.dts b/boards/renesas/ek_ra6m3/ek_ra6m3.dts
@@ -77,3 +77,17 @@
 	mul = <20 0>;
 	status = "okay";
 };
+
+&qspi0 {
+	pinctrl-0 = <&qspi_default>;
+	pinctrl-names = "default";
+	status = "okay";
+	mx25l25645g: ra-qspi-nor@60000000 {
+		compatible = "renesas,ra-qspi-nor";
+		reg = <0x60000000 DT_SIZE_M(32)>;
+		size = <DT_SIZE_M(32)>;
+		status = "okay";
+		write-block-size = <1>;
+		erase-block-size = <4096>;
+	};
+};
diff --git a/boards/renesas/ek_ra6m4/doc/index.rst b/boards/renesas/ek_ra6m4/doc/index.rst
@@ -101,6 +101,8 @@ The below features are currently supported on Zephyr OS for EK-RA6M4 board:
 +-----------+------------+----------------------+
 | CLOCK     | on-chip    | clock control        |
 +-----------+------------+----------------------+
+| QSPI      | on-chip    | qspi flash           |
++-----------+------------+----------------------+
 
 Other hardware features are currently not supported by the port.
 

diff --git a/boards/renesas/ek_ra6m4/ek_ra6m4-pinctrl.dtsi b/boards/renesas/ek_ra6m4/ek_ra6m4-pinctrl.dtsi
@@ -11,4 +11,16 @@
 			<RA_PSEL(RA_PSEL_SCI_0, 4, 10)>;
 		};
 	};
+
+	qspi_default: qspi_default {
+		group1 {
+			/* QSPICLK QSSL QIO0 QIO1 QIO2 QIO3 */
+			psels = <RA_PSEL(RA_PSEL_QSPI, 3, 5)>,
+			<RA_PSEL(RA_PSEL_QSPI, 3, 6)>,
+			<RA_PSEL(RA_PSEL_QSPI, 3, 7)>,
+			<RA_PSEL(RA_PSEL_QSPI, 3, 8)>,
+			<RA_PSEL(RA_PSEL_QSPI, 3, 9)>,
+			<RA_PSEL(RA_PSEL_QSPI, 3, 10)>;
+		};
+	};
 };
diff --git a/boards/renesas/ek_ra6m4/ek_ra6m4.dts b/boards/renesas/ek_ra6m4/ek_ra6m4.dts
@@ -79,3 +79,17 @@
 	div = <2>;
 	status = "okay";
 };
+
+&qspi0 {
+	pinctrl-0 = <&qspi_default>;
+	pinctrl-names = "default";
+	status = "okay";
+	mx25l25645g: ra-qspi-nor@60000000 {
+		compatible = "renesas,ra-qspi-nor";
+		reg = <0x60000000 DT_SIZE_M(32)>;
+		size = <DT_SIZE_M(32)>;
+		status = "okay";
+		write-block-size = <1>;
+		erase-block-size = <4096>;
+	};
+};
diff --git a/boards/renesas/ek_ra6m5/doc/index.rst b/boards/renesas/ek_ra6m5/doc/index.rst
@@ -99,6 +99,8 @@ The below features are currently supported on Zephyr OS for EK-RA6M5 board:
 +-----------+------------+----------------------+
 | CLOCK     | on-chip    | clock control        |
 +-----------+------------+----------------------+
+| QSPI      | on-chip    | qspi flash           |
++-----------+------------+----------------------+
 
 Other hardware features are currently not supported by the port.
 

diff --git a/boards/renesas/ek_ra6m5/ek_ra6m5-pinctrl.dtsi b/boards/renesas/ek_ra6m5/ek_ra6m5-pinctrl.dtsi
@@ -11,4 +11,16 @@
 			<RA_PSEL(RA_PSEL_SCI_0, 4, 10)>;
 		};
 	};
+
+	qspi_default: qspi_default {
+		group1 {
+			/* QSPICLK QSSL QIO0 QIO1 QIO2 QIO3 */
+			psels = <RA_PSEL(RA_PSEL_QSPI, 3, 5)>,
+			<RA_PSEL(RA_PSEL_QSPI, 3, 6)>,
+			<RA_PSEL(RA_PSEL_QSPI, 3, 7)>,
+			<RA_PSEL(RA_PSEL_QSPI, 3, 8)>,
+			<RA_PSEL(RA_PSEL_QSPI, 3, 9)>,
+			<RA_PSEL(RA_PSEL_QSPI, 3, 10)>;
+		};
+	};
 };
diff --git a/boards/renesas/ek_ra6m5/ek_ra6m5.dts b/boards/renesas/ek_ra6m5/ek_ra6m5.dts
@@ -73,3 +73,17 @@
 	mul = <25 0>;
 	status = "okay";
 };
+
+&qspi0 {
+	pinctrl-0 = <&qspi_default>;
+	pinctrl-names = "default";
+	status = "okay";
+	mx25l25645g: ra-qspi-nor@60000000 {
+		compatible = "renesas,ra-qspi-nor";
+		reg = <0x60000000 DT_SIZE_M(32)>;
+		size = <DT_SIZE_M(32)>;
+		status = "okay";
+		write-block-size = <1>;
+		erase-block-size = <4096>;
+	};
+};
diff --git a/drivers/flash/CMakeLists.txt b/drivers/flash/CMakeLists.txt
@@ -153,6 +153,7 @@ zephyr_library_include_directories_ifdef(
   ${ZEPHYR_BASE}/drivers/memc
 )
 
+zephyr_library_sources_ifdef(CONFIG_FLASH_QSPI_RENESAS_RA flash_qspi_renesas_ra.c)
 if(CONFIG_RA_FLASH_HP)
   zephyr_library_sources(flash_hp_ra.c)
   zephyr_library_sources_ifdef(CONFIG_FLASH_EX_OP_ENABLED flash_hp_ra_ex_op.c)

diff --git a/drivers/flash/Kconfig b/drivers/flash/Kconfig
@@ -204,6 +204,8 @@ source "drivers/flash/Kconfig.stm32_xspi"
 source "drivers/flash/Kconfig.xmc4xxx"
 # zephyr-keep-sorted-stop
 
+source "drivers/flash/Kconfig.renesas_ra_flash_qspi"
+
 module = FLASH
 module-str = flash
 source "subsys/logging/Kconfig.template.log_config"

diff --git a/drivers/flash/Kconfig.renesas_ra_flash_qspi b/drivers/flash/Kconfig.renesas_ra_flash_qspi
@@ -0,0 +1,17 @@
+# Renesas RA Family
+
+# Copyright (c) 2024 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+config FLASH_QSPI_RENESAS_RA
+	bool "RA Quad-SPI driver"
+	default y
+	depends on DT_HAS_RENESAS_RA_QSPI_NOR_ENABLED
+	select FLASH_HAS_DRIVER_ENABLED
+	select FLASH_HAS_PAGE_LAYOUT
+	select FLASH_HAS_EXPLICIT_ERASE
+	select USE_RA_FSP_QSPI_NOR_FLASH
+	select FLASH_HAS_EX_OP
+	select FLASH_JESD216
+	help
+	  Enable Quad-SPI Nor flash driver for RA series