fixup soc clock init

zephyrproject-rtos · Jul 6, 2023 · e26368b · e26368b
1 parent da6c8ab
commit e26368b
Showing 1 changed file with 4 additions and 5 deletions.
diff --git a/soc/arm/nxp_imx/rt/soc_rt10xx.c b/soc/arm/nxp_imx/rt/soc_rt10xx.c
@@ -204,21 +204,20 @@ static ALWAYS_INLINE void clock_init(void)
 	IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1RefClkMode, true);
 	IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1TxClkOutputDir, false);
 #else
-	IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1TxClkOutputDir |
-				kIOMUXC_GPR_ENET1RefClkMode, false);
+	IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET2RefClkMode, false);
+	IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1TxClkOutputDir, true);
 #endif
 #endif
 
 #if DT_NODE_HAS_STATUS(DT_NODELABEL(enet2), okay) && CONFIG_NET_L2_ETHERNET
 #ifdef CONFIG_ETH_MCUX_RMII_EXT_CLK
 	/* Set ENET2 ref clock to be generated by External OSC,*/
-	/* direction as output and frequency to 50MHz */
 	IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET2RefClkMode, true);
 	IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET2TxClkOutputDir, false);
 
 #else
-	IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET2TxClkOutputDir |
-				kIOMUXC_GPR_ENET2RefClkMode, false);
+	IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET2RefClkMode, false);
+	IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET2TxClkOutputDir, true);
 #endif
 #endif