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bugfix: soc: esp32: disable interrupts in flash operation
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When interrupts are placed in flash, it needs to be disabled
when flash operations are called. This is not happening in current
v3.7.0 release, causing system to crash whenever flash operations
and interrupts happens simultaneously.

Fixes #77952

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
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sylvioalves authored and nashif committed Sep 18, 2024
1 parent 062d4d5 commit ed1db96
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Showing 6 changed files with 23 additions and 50 deletions.
22 changes: 7 additions & 15 deletions soc/espressif/esp32/soc.c
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,7 @@
#include <xtensa/corebits.h>
#include <esp_private/spi_flash_os.h>
#include <esp_private/esp_mmu_map_private.h>
#include <esp_flash_internal.h>
#if CONFIG_ESP_SPIRAM
#include <esp_psram.h>
#include <esp_private/esp_psram_extram.h>
Expand Down Expand Up @@ -139,17 +140,17 @@ void IRAM_ATTR __esp_platform_start(void)

esp_timer_early_init();

esp_mspi_pin_init();

esp_flash_app_init();

esp_mmu_map_init();

#if CONFIG_SOC_ENABLE_APPCPU
/* start the ESP32 APP CPU */
esp_start_appcpu();
#endif

esp_mmu_map_init();

#ifdef CONFIG_SOC_FLASH_ESP32
esp_mspi_pin_init();
spi_flash_init_chip_state();
#endif

#if CONFIG_ESP_SPIRAM
esp_err_t err = esp_psram_init();
Expand All @@ -174,15 +175,6 @@ void IRAM_ATTR __esp_platform_start(void)
(&_ext_ram_bss_end - &_ext_ram_bss_start) * sizeof(_ext_ram_bss_start));
#endif /* CONFIG_ESP_SPIRAM */

/* Scheduler is not started at this point. Hence, guard functions
* must be initialized after esp_spiram_init_cache which internally
* uses guard functions. Setting guard functions before SPIRAM
* cache initialization will result in a crash.
*/
#if CONFIG_SOC_FLASH_ESP32 || CONFIG_ESP_SPIRAM
spi_flash_guard_set(&g_flash_guard_default_ops);
#endif

#endif /* !CONFIG_MCUBOOT */

esp_intr_initialize();
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21 changes: 4 additions & 17 deletions soc/espressif/esp32c3/soc.c
Original file line number Diff line number Diff line change
Expand Up @@ -21,6 +21,7 @@
#include <soc/interrupt_reg.h>
#include <esp_private/spi_flash_os.h>
#include "esp_private/esp_mmu_map_private.h"
#include <esp_flash_internal.h>

#include <zephyr/drivers/interrupt_controller/intc_esp32c3.h>

Expand Down Expand Up @@ -66,28 +67,14 @@ void __attribute__((section(".iram1"))) __esp_platform_start(void)
REG_CLR_BIT(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_SDIOSLAVE_EN);
SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_EN);

#ifdef CONFIG_SOC_FLASH_ESP32
esp_timer_early_init();

esp_mspi_pin_init();

/**
* This function initialise the Flash chip to the user-defined settings.
*
* In bootloader, we only init Flash (and MSPI) to a preliminary
* state, for being flexible to different chips.
* In this stage, we re-configure the Flash (and MSPI) to required configuration
*/
spi_flash_init_chip_state();
esp_flash_app_init();

esp_mmu_map_init();

#endif /*CONFIG_SOC_FLASH_ESP32*/

esp_timer_early_init();

#if CONFIG_SOC_FLASH_ESP32
spi_flash_guard_set(&g_flash_guard_default_ops);
#endif

#endif /* !CONFIG_MCUBOOT */

/*Initialize the esp32c3 interrupt controller */
Expand Down
7 changes: 4 additions & 3 deletions soc/espressif/esp32c6/soc.c
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,7 @@
#include <soc/interrupt_reg.h>
#include <esp_private/spi_flash_os.h>
#include "esp_private/esp_mmu_map_private.h"
#include <esp_flash_internal.h>

#include <zephyr/drivers/interrupt_controller/intc_esp32c3.h>

Expand Down Expand Up @@ -58,9 +59,9 @@ void IRAM_ATTR __esp_platform_start(void)

esp_timer_early_init();

#if CONFIG_SOC_FLASH_ESP32
spi_flash_guard_set(&g_flash_guard_default_ops);
#endif
esp_mspi_pin_init();

esp_flash_app_init();

esp_mmu_map_init();

Expand Down
17 changes: 4 additions & 13 deletions soc/espressif/esp32s2/soc.c
Original file line number Diff line number Diff line change
Expand Up @@ -98,10 +98,11 @@ void __attribute__((section(".iram1"))) __esp_platform_start(void)
esp_config_data_cache_mode();
esp_rom_Cache_Enable_DCache(0);

#ifdef CONFIG_SOC_FLASH_ESP32
esp_timer_early_init();

esp_mspi_pin_init();
spi_flash_init_chip_state();
#endif /* CONFIG_SOC_FLASH_ESP32 */

esp_flash_app_init();

esp_mmu_map_init();

Expand Down Expand Up @@ -129,16 +130,6 @@ void __attribute__((section(".iram1"))) __esp_platform_start(void)

#endif /* CONFIG_ESP_SPIRAM */

esp_timer_early_init();

/* Scheduler is not started at this point. Hence, guard functions
* must be initialized after esp_spiram_init_cache which internally
* uses guard functions. Setting guard functions before SPIRAM
* cache initialization will result in a crash.
*/
#if CONFIG_SOC_FLASH_ESP32 || CONFIG_ESP_SPIRAM
spi_flash_guard_set(&g_flash_guard_default_ops);
#endif
#endif /* !CONFIG_MCUBOOT */

esp_intr_initialize();
Expand Down
4 changes: 3 additions & 1 deletion soc/espressif/esp32s3/soc.c
Original file line number Diff line number Diff line change
Expand Up @@ -151,12 +151,14 @@ void IRAM_ATTR __esp_platform_start(void)

esp_mspi_pin_init();

spi_flash_init_chip_state();
esp_flash_app_init();

mspi_timing_flash_tuning();

esp_mmu_map_init();

esp_mmu_map_init();

#if CONFIG_ESP_SPIRAM
esp_err_t err = esp_psram_init();

Expand Down
2 changes: 1 addition & 1 deletion west.yml
Original file line number Diff line number Diff line change
Expand Up @@ -157,7 +157,7 @@ manifest:
groups:
- hal
- name: hal_espressif
revision: 87e7902d7184a8280b4d13bce79801a723f4ddd8
revision: 796b3f62af6dc10cb7c7953f73c81882d4011d8d
path: modules/hal/espressif
west-commands: west/west-commands.yml
groups:
Expand Down

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