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Refactor STM32F0xx dtsi #54978
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carlescufi
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zephyrproject-rtos:main
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Refactor STM32F0xx dtsi #54978
carlescufi
merged 18 commits into
zephyrproject-rtos:main
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gautierg-st:refactor_f0_dtsi
Mar 7, 2023
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First commit would require to be split to ease review.
This is specially required if new nodes are added.
Modify the successive dtsi include to better reflect the underlying structure of the F0 family. There are two main subfamilies: STM32F0x0 on one side, and STM32F0x1, x2 and x8 on the other Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Remove USART2 from base dtsi, and add it to F030x8, F070 & F051 Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Remove I2C2 from base dtsi, and add it to F030x8, F070xB & F051 Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Remove TIM6, 7 & 15 from base dtsi, and add TIM6 & 15 to F030x8, TIM7 for F030xC, TIM15 for F070, TIM6 & 7 for F070xC, TIM6 & 15 to F051, and TIM7 for F071. Remove TIM2 from F072 and F091 dtsi since it is already included in F031. Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
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Fix DMA1 interrupt channels. There are 7 for STM32F071 and higher, and 5 for all others, default value for the series. Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Remove calibrated temperature measure from base dtsi since it does not exist for STM32F0x0, and add it only for the other STM32F0. Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Flash erase-block-size is 2048 for F030xC, F070xB, and F071 and higher. For all others, it is 1024, default value in base dtsi. Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Remove SPI2 from F070 (not present on F070x6) and add it to F070xB. Add it to F051 and remove it from F091 (since it is already defined). Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
RTC backup registers are already defined in F031, so no need to include them again. Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add HSI48 to F071, and remove it from F072 and F091. Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add GPIOE to F071, and remove it from F072 and F091. Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Remove DAC1 from F072 and F091 since it alfready defined in F051. Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add USB to STM32F072 dtsi. Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add CAN1 to STM32F091 dtsi. Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add some more USART for F070xB, F071 and F091. Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add a dtsi for STM32F042 for the support of Nucleo F042K6 Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add Kconfig for STMF042x6 to support the Nucleo F042K6. Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
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Add support for Nucleo F042K6 Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
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This PR reorganizes the successive dtsi inclusion of the STM32F0 series to better reflect the subfamilies (STM32F0x0 on one side, STM32F0x1, x2 and x8 on the other). It allows to fix some errors of peripherals included in devices that do not have them, and to remove some duplication by having a more logical and clear inclusion tree.
Also add support for STM32F042 and Nucleo F042K6.