RFC: arch: arm: Remove aarch32 directory and split Cortex-M and Cortex-A/r code

CODEOWNERS

@@ -18,9 +18,9 @@
 /MAINTAINERS.yml                          @MaureenHelm
 /arch/arc/                                @abrodkin @ruuddw @evgeniy-paltsev
 /arch/arm/                                @MaureenHelm @galak @ioannisg
-/arch/arm/core/aarch32/cortex_m/cmse/     @ioannisg
-/arch/arm/include/aarch32/cortex_m/cmse.h @ioannisg
-/arch/arm/core/aarch32/cortex_a_r/        @MaureenHelm @galak @ioannisg @bbolen @stephanosio
+/arch/arm/core/cortex_m/cmse/             @ioannisg
+/arch/arm/include/cortex_m/cmse.h         @ioannisg
+/arch/arm/core/cortex_a_r/                @MaureenHelm @galak @ioannisg @bbolen @stephanosio
 /arch/arm64/                              @carlocaione
 /arch/arm64/core/cortex_r/                @povergoing
 /arch/arm64/core/xen/                     @lorc @firscity
@@ -655,11 +655,11 @@
 /include/zephyr/arch/arc/                        @abrodkin @ruuddw @evgeniy-paltsev
 /include/zephyr/arch/arc/arch.h                  @abrodkin @ruuddw @evgeniy-paltsev
 /include/zephyr/arch/arc/v2/irq.h                @abrodkin @ruuddw @evgeniy-paltsev
-/include/zephyr/arch/arm/aarch32/                @MaureenHelm @galak @ioannisg
-/include/zephyr/arch/arm/aarch32/cortex_a_r/     @stephanosio
+/include/zephyr/arch/arm                         @MaureenHelm @galak @ioannisg
+/include/zephyr/arch/arm/cortex_a_r/             @stephanosio
 /include/zephyr/arch/arm64/                      @carlocaione
 /include/zephyr/arch/arm64/cortex_r/             @povergoing
-/include/zephyr/arch/arm/aarch32/irq.h           @carlocaione
+/include/zephyr/arch/arm/irq.h                   @carlocaione
 /include/zephyr/arch/mips/                       @frantony
 /include/zephyr/arch/nios2/                      @nashif
 /include/zephyr/arch/nios2/arch.h                @nashif

MAINTAINERS.yml

@@ -141,7 +141,6 @@ ARM arch:
   files:
     - arch/arm/
     - arch/arm/core/offsets/
-    - include/zephyr/arch/arm/aarch32/
     - include/zephyr/arch/arm/
     - tests/arch/arm/
     - doc/hardware/arch/arm_cortex_m.rst

arch/arm/CMakeLists.txt

@@ -2,4 +2,4 @@
 
 set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf32-littlearm)
 
-add_subdirectory(core/aarch32)
+add_subdirectory(core)

arch/arm/Kconfig

@@ -69,7 +69,7 @@ config ARM_ON_EXIT_CPU_IDLE
 	  observed on some SoCs caused by a memory access following WFI/WFE
 	  instructions.
 
-rsource "core/aarch32/Kconfig"
-rsource "core/aarch32/Kconfig.vfp"
+rsource "core/Kconfig"
+rsource "core/Kconfig.vfp"
 
 endmenu

arch/arm/core/aarch32/CMakeLists.txt → arch/arm/core/CMakeLists.txt

@@ -3,22 +3,14 @@
 zephyr_library()
 
 zephyr_library_sources(
-  cpu_idle.S
   fatal.c
-  irq_manage.c
   nmi.c
   nmi_on_reset.S
-  prep_c.c
-  swap.c
-  swap_helper.S
-  thread.c
 )
 
-zephyr_library_sources_ifdef(CONFIG_GEN_SW_ISR_TABLE isr_wrapper.S)
 zephyr_library_sources_ifdef(CONFIG_CPP __aeabi_atexit.c)
 zephyr_library_sources_ifdef(CONFIG_IRQ_OFFLOAD irq_offload.c)
-zephyr_library_sources_ifdef(CONFIG_SW_VECTOR_RELAY irq_relay.S)
-zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE ../common/tls.c)
+zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE tls.c)
 zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.S)
 zephyr_library_sources_ifdef(CONFIG_ARM_ZIMAGE_HEADER header.S)
 

arch/arm/core/aarch32/cortex_a_r/CMakeLists.txt → arch/arm/core/cortex_a_r/CMakeLists.txt

@@ -12,8 +12,15 @@ zephyr_library_sources(
   stacks.c
   tcm.c
   vector_table.S
+  swap.c
+  swap_helper.S
+  irq_manage.c
+  prep_c.c
+  thread.c
+  cpu_idle.S
   )
 
+zephyr_library_sources_ifdef(CONFIG_GEN_SW_ISR_TABLE isr_wrapper.S)
 zephyr_library_sources_ifdef(CONFIG_USERSPACE thread.c)
 zephyr_library_sources_ifdef(CONFIG_SEMIHOST semihost.c)
 zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE __aeabi_read_tp.S)

arch/arm/core/cortex_a_r/cpu_idle.S

@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2013-2014 Wind River Systems, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief ARM Cortex-A and Cortex-R power management
+ *
+ */
+
+#include <zephyr/toolchain.h>
+#include <zephyr/linker/sections.h>
+
+#if defined(CONFIG_ARM_ON_EXIT_CPU_IDLE)
+#include <soc_cpu_idle.h>
+#endif
+
+_ASM_FILE_PROLOGUE
+
+GTEXT(arch_cpu_idle)
+GTEXT(arch_cpu_atomic_idle)
+
+.macro _sleep_if_allowed wait_instruction
+#if defined(CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK)
+	push	{r0, lr}
+	bl	z_arm_on_enter_cpu_idle
+	/* Skip the wait instruction if on_enter_cpu_idle() returns false. */
+	cmp	r0, #0
+	beq	_skip_\@
+#endif /* CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK */
+
+	/*
+	 * Wait for all memory transactions to complete before entering low
+	 * power state.
+	 */
+	dsb
+	\wait_instruction
+
+#if defined(CONFIG_ARM_ON_EXIT_CPU_IDLE)
+	/* Inline the macro provided by SoC-specific code */
+	SOC_ON_EXIT_CPU_IDLE
+#endif /* CONFIG_ARM_ON_EXIT_CPU_IDLE */
+
+#if defined(CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK)
+_skip_\@:
+	pop	{r0, lr}
+#endif /* CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK */
+.endm
+
+SECTION_FUNC(TEXT, arch_cpu_idle)
+#ifdef CONFIG_TRACING
+	push	{r0, lr}
+	bl	sys_trace_idle
+	pop	{r0, lr}
+#endif /* CONFIG_TRACING */
+
+	/* Enter low power state */
+	_sleep_if_allowed wfi
+
+	/*
+	 * Clear PRIMASK and flush instruction buffer to immediately service
+	 * the wake-up interrupt.
+	 */
+	cpsie	i
+	isb
+
+	bx	lr
+
+SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
+#ifdef CONFIG_TRACING
+	push	{r0, lr}
+	bl	sys_trace_idle
+	pop	{r0, lr}
+#endif /* CONFIG_TRACING */
+
+	/*
+	 * Lock PRIMASK while sleeping: wfe will still get interrupted by
+	 * incoming interrupts but the CPU will not service them right away.
+	 */
+	cpsid	i
+
+	/* r0: interrupt mask from caller */
+
+	/* No BASEPRI, call wfe directly
+	 */
+	_sleep_if_allowed wfe
+
+	cmp	r0, #0
+	bne	_irq_disabled
+	cpsie	i
+_irq_disabled:
+
+	bx	lr

arch/arm/core/aarch32/cortex_a_r/exc_exit.S → arch/arm/core/cortex_a_r/exc_exit.S

@@ -23,7 +23,7 @@ _ASM_FILE_PROLOGUE
 
 GTEXT(z_arm_exc_exit)
 GTEXT(z_arm_int_exit)
-GTEXT(z_arm_pendsv)
+GTEXT(z_arm_do_swap)
 GDATA(_kernel)
 
 .macro userspace_exc_exit
@@ -148,7 +148,7 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, z_arm_int_exit)
 	ldr r1, [r3, #_kernel_offset_to_current]
 	ldr r0, [r3, #_kernel_offset_to_ready_q_cache]
 	cmp r0, r1
-	blne z_arm_pendsv
+	blne z_arm_do_swap
 __EXIT_INT:
 #endif /* CONFIG_PREEMPT_ENABLED */
 
@@ -231,12 +231,12 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, z_arm_exc_exit)
 	/*
 	 * Switch in the next scheduled thread.
 	 *
-	 * Note that z_arm_pendsv must be called in the SVC mode because it
+	 * Note that z_arm_do_swap must be called in the SVC mode because it
 	 * switches to the SVC mode during context switch and returns to the
 	 * caller using lr_svc.
 	 */
 	cps #MODE_SVC
-	bl z_arm_pendsv
+	bl z_arm_do_swap
 
 	/* Decrement exception nesting count */
 	ldr r3, =_kernel