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Enable S32K3 WKPU IP block to pass interrupt trigger through GPIO #62623
Enable S32K3 WKPU IP block to pass interrupt trigger through GPIO #62623
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what about wakeup-source
standard property?
The following west manifest projects have been modified in this Pull Request:
Note: This message is automatically posted and updated by the Manifest GitHub Action. |
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I have added the missing property to allow declaring the GPIO port wake-up capable and updated the test to use it. |
In general I think we need a solution that is cross-vendor compatible. We have now STM32 using HAL directly in their power off sample, Nordic using gpio_interrupt_configure (it works by chance, because what is configured turns out to allow wake-up from pins) and now NXP introducing a vendor specific option. Please, let's propose something that can be made portable. There are enough SoCs with a similar feature. |
@manuargue Thanks for getting this much needed PR in! This is a necessity to allow for using the shields on the CANHUBK3 boards!
@gmarull were you looking at bringing an RFC forward for doing that? I assume your suggestion to find a better eventual combined solution is non-blocking for this PR. |
Introduce an interrupt controller for the NXP S32 WKPU peripheral that can be integrated with GPIO to trigger interrupts through external interrupt pad inputs. WKPU can trigger interrupts from certain input pads that support this function, as well as wake-up events to the power management domain. This patch only adds WKPU functionality as an interrupt controller to extend the number of input pads that can interrupt the core. Power management functionalities are not supported. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Refactor external interrupts infrastructure to prepare supporting multiple interrupt controllers. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Extend the NXP S32 GPIO driver to be able to route external interrupts to either SIUL2 EIRQ interrupt controller or, when available on the SoC, WKPU interrupt controller. Since WKPU can support up to 64 external interrupt sources and SIUL2 EIRQ up to 32, gpio_get_pending_int() is removed and the interrupt controller specific API must be used instead. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Define WKPU interrupt controller node and its respective interrupt sources mapping to GPIO pins. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Enhance the documentation by providing an explanation of WKPU interrupt controller support and how it integrates with GPIO. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
When configuring in/out pins for callback tests, pass the GPIO flags coming from the in/out-gpios respective nodes. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Use the same pins as when testing with SIUL2 EIRQ interrupt controller, but instead test routing the external interrupts to WKPU controller. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
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@dleach02 @manuargue is this something that you're hoping would go in for 3.5? If so, please set the target milestone. |
Why does this still have the DNM label? |
Because of the "TSC" tag. |
TSC passed this for merge during stabilization. Thanks everyone for your patience. |
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This PR introduces an interrupt controller driver for the NXP S32 WKPU and integrates it with the GPIO driver to extend the number of GPIO pins that can interrupt the core.
GPIO pins that are input-interrupt capable support triggering SIUL2 EIRQ interrupts (existing interrupt controller implementation) and/or WKPU interrupts (introduced in this patch). To configure WKPU to trigger an interrupt from a GPIO pin, a SoC-specific flag must be supplied to the
gpios
specifier to instruct the GPIO driver which interrupt controller to use.Important
WKPU supports triggering interrupts from certain input pads that support this function, as well as generating wake-up events to the power management domain. This patch only adds WKPU functionality as an interrupt controller to extend on this SoC the number of input pads that can interrupt the core. Power management functionalities (ie. wake-up events to power management domain) are not supported and are not in the scope of this PR.
Tests: