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New NXP ENET driver #62833
Merged
dleach02
merged 16 commits into
zephyrproject-rtos:main
from
nxp-zephyr:feature/nxp_enet
Nov 28, 2023
Merged
New NXP ENET driver #62833
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81cb6f2
drivers: clock_control: mcux_ccm: Add ENET clock
decsny acc85b5
dts: bindings: ethernet-controller: Add phy mode
decsny 3669796
dts: bindings: Add binding for KSZ8081 PHY
decsny 62be4c7
drivers: ethernet: phy: Add KSZ8081 PHY Driver
decsny a5f4675
dts: bindings: Add NXP ENET bindings
decsny 8b41427
include: NXP ENET driver include header
decsny 57ab744
drivers: mdio: Add NXP ENET MDIO driver
decsny f5efcb6
drivers: ethernet: Add NXP ENET Driver
decsny 3784165
soc: rt10xx: enable phy clock with new driver
decsny e13f28a
soc: nxp: rt10xx: Increase workqueue size for enet
decsny 5dc6528
drivers: clock_control_mcux_ccm: Add ENET PLL clk
decsny 6787d6b
dts: bindings: Add NXP ENET PTP binding
decsny 21b8c4c
drivers: ptp_clock: Add init priority Kconfig
decsny 7650ef4
drivers: ptp_clock: Add NXP ENET PTP Clock Driver
decsny 35b6aed
drivers: eth_nxp_enet: Support PTP
decsny a7a1510
boards: mimxrt10xx_evk: Add new enet overlay
decsny File filter
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135 changes: 135 additions & 0 deletions
135
boards/arm/mimxrt1024_evk/dts/mimxrt1024_evk-enet-experimental.dtsi
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,135 @@ | ||
| /* | ||
| * Copyright 2023 NXP | ||
| * | ||
| * Experimental ENET binding overlay | ||
| */ | ||
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| / { | ||
| soc { | ||
| /delete-node/ ethernet@402d8000; | ||
|
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| enet: enet@402d8000 { | ||
| compatible = "nxp,enet"; | ||
| reg = <0x402D8000 0x628>; | ||
| clocks = <&ccm IMX_CCM_ENET_CLK 0 0>; | ||
| enet_mac: ethernet { | ||
| compatible = "nxp,enet-mac"; | ||
| interrupts = <114 0>; | ||
| interrupt-names = "COMMON"; | ||
| nxp,mdio = <&enet_mdio>; | ||
| nxp,ptp-clock = <&enet_ptp_clock>; | ||
| phy-connection-type = "rmii"; | ||
| status = "disabled"; | ||
| }; | ||
| enet_mdio: mdio { | ||
| compatible = "nxp,enet-mdio"; | ||
| status = "disabled"; | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
| }; | ||
| enet_ptp_clock: ptp_clock { | ||
| compatible = "nxp,enet-ptp-clock"; | ||
| interrupts = <115 0>; | ||
| status = "disabled"; | ||
| clocks = <&ccm IMX_CCM_ENET_PLL 0 0>; | ||
| }; | ||
| }; | ||
| }; | ||
| }; | ||
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| &enet_mac { | ||
| status = "okay"; | ||
| pinctrl-0 = <&pinmux_enet>; | ||
| pinctrl-names = "default"; | ||
| phy-handle = <&phy>; | ||
| }; | ||
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| &enet_mdio { | ||
| status = "okay"; | ||
| pinctrl-0 = <&pinmux_enet_mdio>; | ||
| pinctrl-names = "default"; | ||
| phy: phy@0 { | ||
| compatible = "microchip,ksz8081"; | ||
| reg = <0>; | ||
| status = "okay"; | ||
| mc,reset-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>; | ||
| mc,interrupt-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; | ||
| mc,interface-type = "rmii"; | ||
| }; | ||
| }; | ||
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| &enet_ptp_clock { | ||
| status = "okay"; | ||
| pinctrl-0 = <&pinmux_ptp>; | ||
| pinctrl-names = "default"; | ||
| }; | ||
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| &pinctrl { | ||
| /delete-node/ pinmux_ptp; | ||
| /delete-node/ pinmux_enet; | ||
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| pinmux_enet: pinmux_enet { | ||
| group0 { | ||
| pinmux = <&iomuxc_gpio_ad_b0_08_enet_ref_clk>; | ||
| bias-disable; | ||
| drive-strength = "r0-6"; | ||
| slew-rate = "fast"; | ||
| nxp,speed = "50-mhz"; | ||
| input-enable; | ||
| }; | ||
| group1 { | ||
| pinmux = <&iomuxc_gpio_ad_b0_09_enet_rx_data1>, | ||
| <&iomuxc_gpio_ad_b0_11_enet_rx_en>, | ||
| <&iomuxc_gpio_ad_b0_14_enet_tx_data0>, | ||
| <&iomuxc_gpio_ad_b0_15_enet_tx_data1>, | ||
| <&iomuxc_gpio_ad_b0_13_enet_tx_en>, | ||
| <&iomuxc_gpio_ad_b0_12_enet_rx_er>; | ||
| drive-strength = "r0-5"; | ||
| bias-pull-up; | ||
| bias-pull-up-value = "100k"; | ||
| slew-rate = "fast"; | ||
| nxp,speed = "200-mhz"; | ||
| }; | ||
| group2 { | ||
| pinmux = <&iomuxc_gpio_ad_b0_10_enet_rx_data0>; | ||
| drive-strength = "r0-6"; | ||
| slew-rate = "slow"; | ||
| nxp,speed = "100-mhz"; | ||
| }; | ||
| }; | ||
|
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| pinmux_enet_mdio: pinmux_enet_mdio { | ||
| group0 { | ||
| pinmux = <&iomuxc_gpio_emc_40_enet_mdio>, | ||
| <&iomuxc_gpio_emc_41_enet_mdc>; | ||
| drive-strength = "r0-5"; | ||
| bias-pull-up; | ||
| bias-pull-up-value = "100k"; | ||
| slew-rate = "fast"; | ||
| nxp,speed = "200-mhz"; | ||
| }; | ||
| group1 { | ||
| pinmux = <&iomuxc_gpio_ad_b1_06_gpio1_io22>; | ||
| drive-strength = "r0-5"; | ||
| bias-pull-up; | ||
| bias-pull-up-value = "100k"; | ||
| slew-rate = "slow"; | ||
| nxp,speed = "100-mhz"; | ||
| }; | ||
| group2 { | ||
| pinmux = <&iomuxc_gpio_ad_b0_04_gpio1_io04>; | ||
| drive-strength = "r0-5"; | ||
| bias-pull-up; | ||
| bias-pull-up-value = "100k"; | ||
| slew-rate = "fast"; | ||
| nxp,speed = "100-mhz"; | ||
| }; | ||
| }; | ||
|
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| pinmux_ptp: pinmux_ptp { | ||
| /* Intentionally empty */ | ||
| }; | ||
| }; | ||
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122 changes: 122 additions & 0 deletions
122
boards/arm/mimxrt1050_evk/dts/mimxrt1050_evk-enet-experimental.dtsi
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,122 @@ | ||
| /* | ||
| * Copyright 2023 NXP | ||
| * | ||
| * Experimental ENET binding overlay | ||
| */ | ||
|
|
||
|
|
||
| / { | ||
| soc { | ||
| /delete-node/ ethernet@402d8000; | ||
|
|
||
| enet: enet@402d8000 { | ||
| compatible = "nxp,enet"; | ||
| reg = <0x402D8000 0x628>; | ||
| clocks = <&ccm IMX_CCM_ENET_CLK 0 0>; | ||
| enet_mac: ethernet { | ||
| compatible = "nxp,enet-mac"; | ||
| interrupts = <114 0>; | ||
| interrupt-names = "COMMON"; | ||
| nxp,mdio = <&enet_mdio>; | ||
| nxp,ptp-clock = <&enet_ptp_clock>; | ||
| phy-connection-type = "rmii"; | ||
| status = "disabled"; | ||
| }; | ||
| enet_mdio: mdio { | ||
| compatible = "nxp,enet-mdio"; | ||
| status = "disabled"; | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
| }; | ||
| enet_ptp_clock: ptp_clock { | ||
| compatible = "nxp,enet-ptp-clock"; | ||
| interrupts = <115 0>; | ||
| status = "disabled"; | ||
| clocks = <&ccm IMX_CCM_ENET_PLL 0 0>; | ||
| }; | ||
| }; | ||
| }; | ||
| }; | ||
|
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||
| &enet_mac { | ||
| status = "okay"; | ||
| pinctrl-0 = <&pinmux_enet>; | ||
| pinctrl-names = "default"; | ||
| phy-handle = <&phy>; | ||
| }; | ||
|
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| &enet_mdio { | ||
| status = "okay"; | ||
| pinctrl-0 = <&pinmux_enet_mdio>; | ||
| pinctrl-names = "default"; | ||
| phy: phy@0 { | ||
| compatible = "microchip,ksz8081"; | ||
| reg = <0>; | ||
| status = "okay"; | ||
| mc,reset-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; | ||
| mc,interrupt-gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>; | ||
| mc,interface-type = "rmii"; | ||
| }; | ||
| }; | ||
|
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| &enet_ptp_clock { | ||
| status = "okay"; | ||
| pinctrl-0 = <&pinmux_ptp>; | ||
| pinctrl-names = "default"; | ||
| }; | ||
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| &pinctrl { | ||
| /delete-node/ pinmux_ptp; | ||
| /delete-node/ pinmux_enet; | ||
|
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| pinmux_enet: pinmux_enet { | ||
| group0 { | ||
| pinmux = <&iomuxc_gpio_b1_10_enet_ref_clk>; | ||
| bias-disable; | ||
| drive-strength = "r0-6"; | ||
| slew-rate = "fast"; | ||
| nxp,speed = "50-mhz"; | ||
| input-enable; | ||
| }; | ||
| group1 { | ||
| pinmux = <&iomuxc_gpio_b1_04_enet_rx_data0>, | ||
| <&iomuxc_gpio_b1_05_enet_rx_data1>, | ||
| <&iomuxc_gpio_b1_06_enet_rx_en>, | ||
| <&iomuxc_gpio_b1_07_enet_tx_data0>, | ||
| <&iomuxc_gpio_b1_08_enet_tx_data1>, | ||
| <&iomuxc_gpio_b1_09_enet_tx_en>, | ||
| <&iomuxc_gpio_b1_11_enet_rx_er>; | ||
| drive-strength = "r0-5"; | ||
| bias-pull-up; | ||
| bias-pull-up-value = "100k"; | ||
| slew-rate = "fast"; | ||
| nxp,speed = "200-mhz"; | ||
| }; | ||
| }; | ||
|
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||
| pinmux_enet_mdio: pinmux_enet_mdio { | ||
| group0 { | ||
| pinmux = <&iomuxc_gpio_emc_40_enet_mdc>, | ||
| <&iomuxc_gpio_emc_41_enet_mdio>, | ||
| <&iomuxc_gpio_ad_b0_10_gpio1_io10>, | ||
| <&iomuxc_gpio_ad_b0_09_gpio1_io09>; | ||
| drive-strength = "r0-5"; | ||
| bias-pull-up; | ||
| bias-pull-up-value = "100k"; | ||
| slew-rate = "fast"; | ||
| nxp,speed = "200-mhz"; | ||
| }; | ||
| }; | ||
|
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| pinmux_ptp: pinmux_ptp { | ||
| group0 { | ||
| pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>, | ||
| <&iomuxc_gpio_ad_b1_03_enet_1588_event2_in>; | ||
| drive-strength = "r0-6"; | ||
| slew-rate = "slow"; | ||
| nxp,speed = "100-mhz"; | ||
| }; | ||
| }; | ||
| }; |
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Nit: multiple newlines