samples: compression: exclude esp32s3 board from testing

[sylvioalves]

esp32s3_devkitm_appcpu has not enough RAM memory to support this test. Therefore we can exclude this from testing.

[kartben]

Shouldn't this exclusion be purely dealt with based on the min_ram required by the sample? BTW is there a reason (I'm sure there is!) why xtensa boards don't set ram: and rom: in their yaml file?

In any case, I think there was a regression with PR #63332 and the malloc arena is probably way larger than it should. Can you try CONFIG_COMMON_LIBC_MALLOC_ARENA_SIZE=24576? The sample seem to run just fine for me with this (qemu cortexm3 and native posix).

@keith-packard do you remember if there was a reason for setting such a large (64K) arena for the lz4 sample?

[sylvioalves]

@kartben, in case of esp32s3_devkitm_appcpu, which is part of the AMP support, it has only 64kb of RAM. When building such samples like that, it just won't build. Any other suggestion besides removing this particular AMP's second core board from that list?

[kartben]

@kartben, in case of esp32s3_devkitm_appcpu, which is part of the AMP support, it has only 64kb of RAM. When building such samples like that, it just won't build. Any other suggestion besides removing this particular AMP's second core board from that list?

As per my comment, it looks like the sample requires actually way less than one might have thought. By changing the malloc arena size to 24K, it seems to fit just fine in the appcpu (haven't tried to run on an actual target though)

[154/154] Linking C executable zephyr/esp32_net_firmware.elf
Memory region         Used Size  Region Size  %age Used
     iram0_0_seg:       71640 B       128 KB     54.66%
     dram0_0_seg:       50688 B        64 KB     77.34%
        IDT_LIST:          0 GB         8 KB      0.00%

[sylvioalves]

@kartben, in case of esp32s3_devkitm_appcpu, which is part of the AMP support, it has only 64kb of RAM. When building such samples like that, it just won't build. Any other suggestion besides removing this particular AMP's second core board from that list?

As per my comment, it looks like the sample requires actually way less than one might have thought. By changing the malloc arena size to 24K, it seems to fit just fine in the appcpu (haven't tried to run on an actual target though)

[154/154] Linking C executable zephyr/esp32_net_firmware.elf
Memory region         Used Size  Region Size  %age Used
     iram0_0_seg:       71640 B       128 KB     54.66%
     dram0_0_seg:       50688 B        64 KB     77.34%
        IDT_LIST:          0 GB         8 KB      0.00%

Sure, then it is up to verifying whether lz4 compression sample can work with that 24k arena size. If yes, this PR can be closed. Edit: Ok, you have tested with qemu and native posix. It is also ok on esp32s3 side as well.

[kartben]

Superseded by #65129