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dts: nordic: nrf5340: Change nRF5340 IPC backend to icbmsg #79093

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dts: nordic: nrf5340: Change nRF5340 IPC backend to icbmsg #79093

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4 changes: 2 additions & 2 deletions boards/ezurio/bl5340_dvk/bl5340_dvk_nrf5340_cpuapp_partition_conf.dtsi
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Expand Up @@ -57,5 +57,5 @@
reg = <0x20040000 0x30000>;
};

/* Include shared RAM configuration file */
#include "bl5340_dvk_nrf5340_shared_sram_planning_conf.dtsi"
/* Include default shared RAM configuration file */
#include <common/nordic/nrf5340_shared_sram_partition.dtsi>
4 changes: 2 additions & 2 deletions boards/ezurio/bl5340_dvk/bl5340_dvk_nrf5340_cpunet_common.dtsi
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Expand Up @@ -63,5 +63,5 @@
};
};

/* Include shared RAM configuration file */
#include "bl5340_dvk_nrf5340_shared_sram_planning_conf.dtsi"
/* Include default shared RAM configuration file */
#include <common/nordic/nrf5340_shared_sram_partition.dtsi>
31 changes: 0 additions & 31 deletions boards/ezurio/bl5340_dvk/bl5340_dvk_nrf5340_shared_sram_planning_conf.dtsi
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10 changes: 6 additions & 4 deletions dts/arm/nordic/nrf5340_cpuapp_ipc.dtsi
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Expand Up @@ -5,12 +5,14 @@
*/

ipc0: ipc0 {
compatible = "zephyr,ipc-openamp-static-vrings";
memory-region = <&sram0_shared>;
compatible = "zephyr,ipc-icbmsg";
status = "okay";
mboxes = <&mbox 0>, <&mbox 1>;
mbox-names = "tx", "rx";
role = "host";
status = "okay";
tx-region = <&cpuapp_cpunet_ipc_shm>;
rx-region = <&cpunet_cpuapp_ipc_shm>;
tx-blocks = <32>;
rx-blocks = <32>;

bt_hci_ipc0: bt_hci_ipc0 {
compatible = "zephyr,bt-hci-ipc";
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10 changes: 6 additions & 4 deletions dts/arm/nordic/nrf5340_cpunet.dtsi
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Expand Up @@ -347,12 +347,14 @@
/* Default IPC description */
ipc {
ipc0: ipc0 {
compatible = "zephyr,ipc-openamp-static-vrings";
memory-region = <&sram0_shared>;
compatible = "zephyr,ipc-icbmsg";
status = "okay";
mboxes = <&mbox 0>, <&mbox 1>;
mbox-names = "rx", "tx";
role = "remote";
status = "okay";
tx-region = <&cpunet_cpuapp_ipc_shm>;
rx-region = <&cpuapp_cpunet_ipc_shm>;
tx-blocks = <32>;
rx-blocks = <32>;
};
};
};
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14 changes: 13 additions & 1 deletion dts/common/nordic/nrf5340_shared_sram_partition.dtsi
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Expand Up @@ -14,7 +14,9 @@
* the memory range allocated to the non-secure image (sram0_ns).
*
* By default the last 64 kB of application core SRAM is allocated as shared
* memory (sram0_shared).
* memory (sram0_shared) which is divided in:
* - 32 kB CPUAPP to CPUNET communication (cpuapp_cpunet_ipc_shm)
* - 32 kB CPUNET to CPUAPP communication (cpunet_cpuapp_ipc_shm)
*/

/ {
Expand All @@ -28,8 +30,18 @@
ranges;

sram0_shared: memory@20070000 {
#address-cells = <1>;
#size-cells = <1>;
/* Last 64 kB of sram0 */
reg = <0x20070000 0x10000>;

cpuapp_cpunet_ipc_shm: memory@20070000 {
reg = <0x20070000 DT_SIZE_K(32)>;
};

cpunet_cpuapp_ipc_shm: memory@20078000 {
reg = <0x20078000 DT_SIZE_K(32)>;
};
};
};
};
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