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arch: riscv: isr.S: restore s0 before jumping to z_riscv_fatal_error_csf #79096

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@ycsin ycsin commented Sep 27, 2024

Made by @dreiss in our internal fork:

Restore the s0 we saved early in ISR entry so it shows up properly in the CSF.

Restore the s0 we saved early in ISR entry so it shows up
properly in the CSF.

Signed-off-by: David Reiss <dreiss@meta.com>
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Test if callee-saved-registers values are as expected.

Signed-off-by: David Reiss <dreiss@meta.com>
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
@ycsin ycsin marked this pull request as ready for review September 28, 2024 01:59
@zephyrbot zephyrbot added the area: RISCV RISCV Architecture (32-bit & 64-bit) label Sep 28, 2024
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Good catch.

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