soc: silabs: Initialize oscillators and clock tree from DT, clean up init sequence

MAINTAINERS.yml

@@ -4814,7 +4814,7 @@ West:
     - mnkp
     - rettichschnidi
   files:
-    - modules/Kconfig.silabs
+    - modules/hal_silabs/
   labels:
     - "platform: Silabs"
 

boards/silabs/dev_kits/sltb010a/board.c

@@ -8,22 +8,12 @@
 #include <zephyr/init.h>
 #include <zephyr/logging/log.h>
 
-#ifdef CONFIG_SOC_GECKO_DEV_INIT
-#include "em_cmu.h"
-#endif
-
-
 LOG_MODULE_REGISTER(thunderboard, CONFIG_BOARD_SLTB010A_LOG_LEVEL);
 
-static int thunderboard_init_clocks(void);
-
 static int thunderboard_init(void)
 {
 	int ret;
 
-#ifdef CONFIG_SOC_GECKO_DEV_INIT
-	thunderboard_init_clocks();
-#endif
 	static struct gpio_dt_spec wake_up_gpio_dev =
 		GPIO_DT_SPEC_GET(DT_NODELABEL(wake_up_trigger), gpios);
 
@@ -40,25 +30,5 @@ static int thunderboard_init(void)
 	return 0;
 }
 
-#ifdef CONFIG_SOC_GECKO_DEV_INIT
-static int thunderboard_init_clocks(void)
-{
-	CMU_ClockSelectSet(cmuClock_SYSCLK, cmuSelect_HFRCODPLL);
-#if defined(_CMU_EM01GRPACLKCTRL_MASK)
-	CMU_ClockSelectSet(cmuClock_EM01GRPACLK, cmuSelect_HFRCODPLL);
-#endif
-#if defined(_CMU_EM01GRPBCLKCTRL_MASK)
-	CMU_ClockSelectSet(cmuClock_EM01GRPBCLK, cmuSelect_HFRCODPLL);
-#endif
-	CMU_ClockSelectSet(cmuClock_EM23GRPACLK, cmuSelect_LFRCO);
-#if defined(RTCC_PRESENT)
-	CMU_ClockSelectSet(cmuClock_RTCC, cmuSelect_LFRCO);
-#endif
-	CMU_ClockSelectSet(cmuClock_WDOG0, cmuSelect_LFRCO);
-
-	return 0;
-}
-#endif
-
 /* needs to be done after GPIO driver init */
 SYS_INIT(thunderboard_init, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);

boards/silabs/dev_kits/sltb010a/sltb010a.dts

@@ -8,6 +8,7 @@
 #include <silabs/efr32bg22.dtsi>
 #include <silabs/efr32bg2x-pinctrl.dtsi>
 #include "thunderboard.dtsi"
+#include <zephyr/dt-bindings/regulator/silabs_dcdc.h>
 
 / {
 	/* These aliases are provided for compatibility with samples */
@@ -27,6 +28,50 @@
 	};
 };
 
+&hfxo {
+	status = "okay";
+	ctune = <120>;
+	precision = <50>;
+};
+
+&lfxo {
+	status = "okay";
+	ctune = <37>;
+	precision = <50>;
+};
+
+&hfrcodpll {
+	clock-frequency = <DT_FREQ_K(76800)>;
+	clocks = <&hfxo>;
+	dpll-n = <3839>;
+	dpll-m = <1919>;
+	dpll-edge = "fall";
+	dpll-lock = "phase";
+	dpll-autorecover;
+};
+
+&em23grpaclk {
+	clocks = <&lfxo>;
+};
+
+&em4grpaclk {
+	clocks = <&lfxo>;
+};
+
+&rtccclk {
+	clocks = <&lfxo>;
+};
+
+&wdog0clk {
+	clocks = <&lfxo>;
+};
+
+&dcdc {
+	status = "okay";
+	regulator-boot-on;
+	regulator-initial-mode = <SILABS_DCDC_MODE_BUCK>;
+};
+
 &flash0 {
 	partitions {
 		/* Reserve 48 KiB for the bootloader */

boards/silabs/dev_kits/sltb010a/sltb010a_defconfig

@@ -10,11 +10,6 @@ CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y
 CONFIG_HW_STACK_PROTECTION=y
 CONFIG_PINCTRL=y
 
-# Used if SysTick is enabled, ignored for BURTC
-# (BURTC uses TIMER_READS_ITS_FREQUENCY_AT_RUNTIME)
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=76800000
-
 # Use BURTC as system clock source
 CONFIG_GECKO_BURTC_TIMER=y
-CONFIG_CMU_BURTCCLK_LFXO=y
 CONFIG_SYS_CLOCK_TICKS_PER_SEC=1024

boards/silabs/dev_kits/xg24_dk2601b/board.c

@@ -9,21 +9,12 @@
 #include <zephyr/sys/printk.h>
 #include <zephyr/logging/log.h>
 
-#ifdef CONFIG_SOC_GECKO_DEV_INIT
-#include "em_cmu.h"
-#endif
-
 LOG_MODULE_REGISTER(efr32xg24_dk2601b, CONFIG_BOARD_EFR32MG24_LOG_LEVEL);
 
-static int efr32xg24_dk2601b_init_clocks(void);
-
 static int efr32xg24_dk2601b_init(void)
 {
 	int ret;
 
-#ifdef CONFIG_SOC_GECKO_DEV_INIT
-	efr32xg24_dk2601b_init_clocks();
-#endif
 	static struct gpio_dt_spec wake_up_gpio_dev =
 		GPIO_DT_SPEC_GET(DT_NODELABEL(wake_up_trigger), gpios);
 
@@ -40,32 +31,5 @@ static int efr32xg24_dk2601b_init(void)
 	return 0;
 }
 
-#ifdef CONFIG_SOC_GECKO_DEV_INIT
-static int efr32xg24_dk2601b_init_clocks(void)
-{
-	CMU_ClockSelectSet(cmuClock_SYSCLK, cmuSelect_HFRCODPLL);
-#if defined(_CMU_EM01GRPACLKCTRL_MASK)
-	CMU_ClockSelectSet(cmuClock_EM01GRPACLK, cmuSelect_HFRCODPLL);
-#endif
-#if defined(_CMU_EM01GRPBCLKCTRL_MASK)
-	CMU_ClockSelectSet(cmuClock_EM01GRPBCLK, cmuSelect_HFRCODPLL);
-#endif
-	CMU_ClockSelectSet(cmuClock_EM23GRPACLK, cmuSelect_LFRCO);
-	CMU_ClockSelectSet(cmuClock_EM4GRPACLK, cmuSelect_LFRCO);
-#if defined(RTCC_PRESENT)
-	CMU_ClockSelectSet(cmuClock_RTCC, cmuSelect_LFRCO);
-#endif
-#if defined(SYSRTC_PRESENT)
-	CMU_ClockSelectSet(cmuClock_SYSRTC, cmuSelect_LFRCO);
-#endif
-	CMU_ClockSelectSet(cmuClock_WDOG0, cmuSelect_LFRCO);
-#if WDOG_COUNT > 1
-	CMU_ClockSelectSet(cmuClock_WDOG1, cmuSelect_LFRCO);
-#endif
-
-	return 0;
-}
-#endif
-
 /* needs to be done after GPIO driver init */
 SYS_INIT(efr32xg24_dk2601b_init, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);

boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b.dts

@@ -8,6 +8,7 @@
 #include <silabs/efr32mg24b310f1536im48.dtsi>
 #include <silabs/efr32mg24-pinctrl.dtsi>
 #include <zephyr/dt-bindings/input/input-event-codes.h>
+#include <zephyr/dt-bindings/regulator/silabs_dcdc.h>
 
 / {
 	model = "Silicon Labs BRD2601B (xG24 Dev Kit)";
@@ -73,6 +74,48 @@
 	clock-frequency = <78000000>;
 };
 
+&hfxo {
+	status = "okay";
+	ctune = <140>;
+	precision = <50>;
+};
+
+&lfxo {
+	status = "okay";
+	ctune = <63>;
+	precision = <50>;
+};
+
+&hfrcodpll {
+	clock-frequency = <DT_FREQ_M(78)>;
+	clocks = <&hfxo>;
+	dpll-n = <3839>;
+	dpll-m = <1919>;
+	dpll-edge = "fall";
+	dpll-lock = "phase";
+	dpll-autorecover;
+};
+
+&em23grpaclk {
+	clocks = <&lfxo>;
+};
+
+&em4grpaclk {
+	clocks = <&lfxo>;
+};
+
+&sysrtcclk {
+	clocks = <&lfxo>;
+};
+
+&wdog0clk {
+	clocks = <&lfxo>;
+};
+
+&wdog1clk {
+	clocks = <&lfxo>;
+};
+
 &usart0 {
 	current-speed = <115200>;
 	pinctrl-0 = <&usart0_default>;
@@ -132,6 +175,13 @@
 	status = "okay";
 };
 
+&dcdc {
+	status = "okay";
+	regulator-boot-on;
+	regulator-initial-mode = <SILABS_DCDC_MODE_BUCK>;
+	silabs,pfmx-peak-current-milliamp = <120>;
+};
+
 &flash0 {
 	partitions {
 		compatible = "fixed-partitions";

boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b_defconfig

@@ -7,9 +7,6 @@ CONFIG_UART_CONSOLE=y
 CONFIG_SERIAL=y
 CONFIG_CORTEX_M_SYSTICK=y
 CONFIG_GPIO=y
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=76800000
-CONFIG_CMU_HFCLK_HFXO=y
-CONFIG_CMU_HFCLK_LFXO=y
 CONFIG_HW_STACK_PROTECTION=y
 CONFIG_PINCTRL=y
 CONFIG_REGULATOR=y

boards/silabs/dev_kits/xg27_dk2602a/board.c

@@ -8,22 +8,12 @@
 #include <zephyr/init.h>
 #include <zephyr/logging/log.h>
 
-#ifdef CONFIG_SOC_GECKO_DEV_INIT
-#include "em_cmu.h"
-#endif
-
-
 LOG_MODULE_REGISTER(dev_kit, CONFIG_BOARD_XG27_DK2602A_LOG_LEVEL);
 
-static int dev_kit_init_clocks(void);
-
 static int dev_kit_init(void)
 {
 	int ret;
 
-#ifdef CONFIG_SOC_GECKO_DEV_INIT
-	dev_kit_init_clocks();
-#endif
 	static struct gpio_dt_spec wake_up_gpio_dev =
 		GPIO_DT_SPEC_GET(DT_NODELABEL(wake_up_trigger), gpios);
 
@@ -40,25 +30,5 @@ static int dev_kit_init(void)
 	return 0;
 }
 
-#ifdef CONFIG_SOC_GECKO_DEV_INIT
-static int dev_kit_init_clocks(void)
-{
-	CMU_ClockSelectSet(cmuClock_SYSCLK, cmuSelect_HFRCODPLL);
-#if defined(_CMU_EM01GRPACLKCTRL_MASK)
-	CMU_ClockSelectSet(cmuClock_EM01GRPACLK, cmuSelect_HFRCODPLL);
-#endif
-#if defined(_CMU_EM01GRPBCLKCTRL_MASK)
-	CMU_ClockSelectSet(cmuClock_EM01GRPBCLK, cmuSelect_HFRCODPLL);
-#endif
-	CMU_ClockSelectSet(cmuClock_EM23GRPACLK, cmuSelect_LFRCO);
-#if defined(RTCC_PRESENT)
-	CMU_ClockSelectSet(cmuClock_RTCC, cmuSelect_LFRCO);
-#endif
-	CMU_ClockSelectSet(cmuClock_WDOG0, cmuSelect_LFRCO);
-
-	return 0;
-}
-#endif
-
 /* needs to be done after GPIO driver init */
 SYS_INIT(dev_kit_init, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);

boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a.dts

@@ -8,6 +8,7 @@
 #include <silabs/efr32bg27.dtsi>
 #include <silabs/efr32bg2x-pinctrl.dtsi>
 #include "thunderboard.dtsi"
+#include <zephyr/dt-bindings/regulator/silabs_dcdc.h>
 
 / {
 	model = "Silicon Labs xG27-DK2602A Dev Kit";
@@ -31,6 +32,50 @@
 	};
 };
 
+&hfxo {
+	status = "okay";
+	ctune = <140>;
+	precision = <50>;
+};
+
+&lfxo {
+	status = "okay";
+	ctune = <63>;
+	precision = <50>;
+};
+
+&hfrcodpll {
+	clock-frequency = <DT_FREQ_K(76800)>;
+	clocks = <&hfxo>;
+	dpll-n = <3839>;
+	dpll-m = <1919>;
+	dpll-edge = "fall";
+	dpll-lock = "phase";
+	dpll-autorecover;
+};
+
+&em23grpaclk {
+	clocks = <&lfxo>;
+};
+
+&em4grpaclk {
+	clocks = <&lfxo>;
+};
+
+&rtccclk {
+	clocks = <&lfxo>;
+};
+
+&wdog0clk {
+	clocks = <&lfxo>;
+};
+
+&dcdc {
+	status = "okay";
+	regulator-boot-on;
+	regulator-initial-mode = <SILABS_DCDC_MODE_BUCK>;
+};
+
 &flash0 {
 	partitions {
 		/* Reserve 48 KiB for the bootloader */

boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a_defconfig

@@ -10,11 +10,6 @@ CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y
 CONFIG_HW_STACK_PROTECTION=y
 CONFIG_PINCTRL=y
 
-# Used if SysTick is enabled, ignored for BURTC
-# (BURTC uses TIMER_READS_ITS_FREQUENCY_AT_RUNTIME)
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=76800000
-
 # Use BURTC as system clock source
 CONFIG_GECKO_BURTC_TIMER=y
-CONFIG_CMU_BURTCCLK_LFXO=y
 CONFIG_SYS_CLOCK_TICKS_PER_SEC=1024