drivers: dma: Add initial support for NXP SDMA #80330
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This adds initial support for NXP SDMA controller. We make use of NXP HAL to configure the IP. SDMA uses BD (buffer descriptors) to describe a transfer. We create a cyclic list of descriptors and trigger them manually at start and later when data is available. This is tested using Sound Open Firmware app on top of Zephyr. Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Add sai3 and sdma3 nodes found on NXP i.MX8MP SOC. Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
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| /* buffer is full */ | ||
| chan_data->stat.pending_length = chan_data->capacity; | ||
| chan_data->stat.free = 0; | ||
| } else { |
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We should have here PERIPHERAL_TO_MEMORY and a default case in which we log an error.
LE: and in similar places below
| /* Clear channel 0 */ | ||
| SDMA_ClearChannelInterruptStatus(dev_cfg->base, 1U); | ||
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| /* Ignore channel 0, is it is used only for download */ |
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s/is it is used only for download/is used only for download
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This adds initial support for NXP SDMA controller. We make use
of NXP HAL to configure the IP. SDMA uses BD (buffer descriptors) to describe a transfer. We create
a cyclic list of descriptors and trigger them manually at start and later when data is available.
This is tested using Sound Open Firmware app on top of Zephyr.
We first need to merge following PRs: