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Remove upper bound on the SiliconCompiler version #102

Remove upper bound on the SiliconCompiler version

Remove upper bound on the SiliconCompiler version #102

Triggered via pull request September 6, 2023 02:12
Status Success
Total duration 21s
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lint.yml

on: pull_request
Lint Verilog Code
8s
Lint Verilog Code
Lint C/C++ Code Style
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Lint C/C++ Code Style
Matrix: Lint Python Code
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