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platform.rev_c123: add Ram-Pak resources. (NOT VERIFIED)
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whitequark committed Oct 29, 2023
1 parent adf0d9f commit 2ca535d
Showing 1 changed file with 36 additions and 0 deletions.
36 changes: 36 additions & 0 deletions software/glasgow/platform/rev_c.py
Original file line number Diff line number Diff line change
Expand Up @@ -121,6 +121,42 @@ class _GlasgowPlatformRevC(GlasgowPlatformICE40):
"F2 - - E3 E1 E2 D1 - - D2 C1 D3 C2 - - C3 B1 C4 B2 - - - "),
]

def add_ram_pak_resources(self):
self.add_resources([
Resource("hyperram", 0,
Subsignal("reset",
Pins("21", dir="o", conn=("lvds", 0)),
Attrs(IO_STANDARD="SB_LVCMOS18")),
Subsignal("cs",
Pins("8", dir="o", conn=("lvds", 0)),
Attrs(IO_STANDARD="SB_LVCMOS18")),
Subsignal("clk",
DiffPairs("5", "3", dir="o", conn=("lvds", 0)),
Attrs(IO_STANDARD="SB_LVDS")),
Subsignal("rwds",
Pins("10", dir="io", conn=("lvds", 0)),
Attrs(IO_STANDARD="SB_LVCMOS18")),
Subsignal("dq",
Pins("16 15 9 11 14 17 20 22", dir="io", conn=("lvds", 0))),
Attrs(IO_STANDARD="SB_LVCMOS18")),
Resource("hyperram", 1,
Subsignal("reset",
Pins("23", dir="o", conn=("lvds", 0)),
Attrs(IO_STANDARD="SB_LVCMOS18")),
Subsignal("cs",
Pins("27", dir="o", conn=("lvds", 0)),
Attrs(IO_STANDARD="SB_LVCMOS18")),
Subsignal("clk",
DiffPairs("26", "28", dir="o", conn=("lvds", 0)),
Attrs(IO_STANDARD="SB_LVDS")),
Subsignal("rwds",
Pins("29", dir="io", conn=("lvds", 0)),
Attrs(IO_STANDARD="SB_LVCMOS18")),
Subsignal("dq",
Pins("35 38 32 34 33 40 39 41", dir="io", conn=("lvds", 0))),
Attrs(IO_STANDARD="SB_LVCMOS18")),
])


class GlasgowPlatformRevC0(_GlasgowPlatformRevC):
resources = _GlasgowPlatformRevC.resources + [
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