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NetFPGA 1G CML Crypto Example

david00 edited this page Apr 9, 2015 · 12 revisions

NetFPGA-1G-CML Crypto Example Design

This design demonstrates how to access access the ATSHA204 CryptAuthentication chip and M41T62 Real-Time Clock with the FPGA. Both the Real-Time Clock and ATSHA204 are connected to the PIC's I2C2 interface, so a software API was created for the FPGA that communicates over SPI with the PIC to instruct it to do various commands with the ATSHA204 and RTC. This project includes the FPGA hardware design and embedded Microblaze and PIC code to accomplish these tasks.

NOTE: at this time, a PICkit 3 is required for this project.

Location

contrib-projects/nf1_cml_crypto_example

Overview

The ATSHA204 and RTC are connected to the I2C2 hardware block in the PIC. To perform cryptographic and authentication operations with the ATSHA204 or read and write the RTC, the FPGA sends commands and data via SPI to the PIC. The PIC receives the commands and data (if applicable), preforms the commands, and sends responses back to the FPGA via SPI.

This project demostrates how to perform the following operations:

  • read the ATSHA204 configuration zone (zone was locked during manufacturing so only reads are possible)
  • get a number used once (NONCE) using the ATSHA204's NONCE command
  • read and write the data slots ("keys") on the ATSHA204
  • generate a SHA256 Message Authentication Code (MAC) using the ATSHA204's MAC command
  • authenticate a SHA256 hash using the ATSHA204's NONCE and CheckMAC commands
  • read and write the RTC

For more information on the ATSHA204 go here.

For more information on the RTC go here.

Board Setup

Connect one PmodUSBUART to the top row of JA, and a second to the top row of JB. Open both UARTs in minicom windows with 115200 baud. Connect the FPGA's USB PROG (J12) port to your development machine, and a PICkit 3 to the PIC PROG CABLE (J14) zig-zag connector using a 6-pin Pmod extension cable (the white arrow on the PICkit 3 should connect to pin 1 on J14). Power the card from the PCIe power connector.

Building and Running

First, install Microchip's MPLAB X IDE, IPE, and XC32 compiler from here.

The PIC application was developed using MPLAB X v2.35 and XC32 v1.32. It should be possible to use the project with any version of MPLAB X, but the XC32 compiler should be v1.32, which can be found by clicking on MPLABXC Compilers-> Downloads Archive, and then navigating to Language Tools Archive->MPLAB XC32-> v1.32 (Linux) (05/30/2014). The compiler can be run in "free" mode, which does not require a license.

Once these are installed, add the XC32 compiler to your environment PATH with:

$ export PATH=/opt/microchip/xc32/v1.32/bin:$PATH

This command assumes the compiler was installed in its default location, modify the path to the compiler if it was installed at a different location.

Then, run the "make" command in this directory to view the available make options. To get started initially, run "make pic" and program the PIC with the hexfile generated at sw/embedded/pic/dist/default/production/pic.production.hex using MPLAB IPE. Alternately, the sw/embedded/pic folder can be opened as a project in MPLAB X and the project can be built and programmed to the PIC within the IDE. Finally, run "make fpga" to build the FPGA design and software and automatically download and run the application.

As the application runs, output will be generated on the UART windows that provides information about the commands being run and the sequence of events that the firmware performs to complete the commands.

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