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Adaptive Clocking Techniques for SoC Supply Droop Response.pptx
Adaptive Clocking Techniques for SoC Supply Droop Response.pptx
 
 
Fritchman and Rahman - EE241B Final Report.pdf
Fritchman and Rahman - EE241B Final Report.pdf
 
 
IEEEtran.cls
IEEEtran.cls
 
 
IEEEtran_HOWTO.pdf
IEEEtran_HOWTO.pdf
 
 
[PPT] Adaptive Clocking Techniques for SoC Supply Droop Response.pdf
[PPT] Adaptive Clocking Techniques for SoC Supply Droop Response.pdf
 
 
acd.png
acd.png
 
 
asap7_dlystage_vs_nFin.csv
asap7_dlystage_vs_nFin.csv
 
 
asap7_jitteramp_vs_nFin.csv
asap7_jitteramp_vs_nFin.csv
 
 
brake1.png
brake1.png
 
 
conference_101719.pdf
conference_101719.pdf
 
 
conference_101719.synctex.gz
conference_101719.synctex.gz
 
 
conference_101719.tex
conference_101719.tex
 
 
dco_response.csv
dco_response.csv
 
 
does_svg_work.svg
does_svg_work.svg
 
 
fVCO_avg_vs_droopctrl.csv
fVCO_avg_vs_droopctrl.csv
 
 
fVCO_avg_vs_oscctrl.csv
fVCO_avg_vs_oscctrl.csv
 
 
fig1.png
fig1.png
 
 
fig_c2moslayout.png
fig_c2moslayout.png
 
 
fig_c2mossch.png
fig_c2mossch.png
 
 
fig_dco.png
fig_dco.png
 
 
fig_dco_dacrange.png
fig_dco_dacrange.png
 
 
fig_dco_droopctrl.png
fig_dco_droopctrl.png
 
 
fig_dco_drooprange.png
fig_dco_drooprange.png
 
 
fig_dco_oscctrl.png
fig_dco_oscctrl.png
 
 
fig_dco_response.png
fig_dco_response.png
 
 
fig_detail_acd.png
fig_detail_acd.png
 
 
fig_detail_pll.png
fig_detail_pll.png
 
 
fig_detail_pllarch.png
fig_detail_pllarch.png
 
 
fig_dllasap7.png
fig_dllasap7.png
 
 
fig_dlystage.png
fig_dlystage.png
 
 
fig_droop.png
fig_droop.png
 
 
fig_droop_combined.png
fig_droop_combined.png
 
 
fig_droop_schem.png
fig_droop_schem.png
 
 
fig_drooplatency.png
fig_drooplatency.png
 
 
fig_drooptransient.png
fig_drooptransient.png
 
 
fig_fmax.png
fig_fmax.png
 
 
fig_freqreboundctrl_postpandr_timing.png
fig_freqreboundctrl_postpandr_timing.png
 
 
fig_jitteramp.png
fig_jitteramp.png
 
 
fig_overview_acd.png
fig_overview_acd.png
 
 
fig_overview_pll.png
fig_overview_pll.png
 
 
fig_phasemargin.png
fig_phasemargin.png
 
 
fig_pll_model.png
fig_pll_model.png
 
 
fig_scope.png
fig_scope.png
 
 
fig_subtledelay.png
fig_subtledelay.png
 
 
pll.png
pll.png
 
 
pnr3.png
pnr3.png
 
 
process_dco_droopctrl.m
process_dco_droopctrl.m
 
 
process_dco_oscctrl.m
process_dco_oscctrl.m
 
 
process_dco_response.asv
process_dco_response.asv
 
 
process_dco_response.m
process_dco_response.m
 
 
process_dlystage_vs_nFin.m
process_dlystage_vs_nFin.m
 
 
process_jitteramp_vs_nFin.m
process_jitteramp_vs_nFin.m
 
 
process_supply_droop.m
process_supply_droop.m
 
 
raw_comparison_table.xlsx
raw_comparison_table.xlsx
 
 
readme.md
readme.md
 
 
references.bib
references.bib
 
 
report_figures.vsdx
report_figures.vsdx
 
 
stage-delay.png
stage-delay.png
 
 

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(Not Really) Synthesizable PLLs

A final report

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