This repository presents the design of Four-Quadrant Analog Multiplier implemented using Synopsys Custom Compiler Tool in 28nm Technology.
Four-Quadrant Analog Multiplier in 28nm Technology
- Abstract
- Introduction
- Four-Quadrant Analog Multiplier
- Tools Used
- Pre-Layout Schematics and Simulations
- Simulations
- Conclusion
- References
- Acknowledgement
- Author
Multiplication of two analog input signals is one of the most important factors which we need while working or performing operations in Analog Signal Processing. As, the multiplier is such type of a basic circuit that is used as a subcircuit in many of the other circuits, for example, it is used in analog computers, analog signal processing, etc. Up to now there are so many analog multipliers are designed with the reduction of power supply voltages, there are many CMOS existing analog multipliers are designed but they are generally designed to be operated at higher supply voltages, which are unfortunately not suitable to be applied to battery-powered systems such as portable communications systems equipment, some radio receivers, etc.
Therefore, we are going to design a Low power consumption CMOS Analog Multiplier. The technique which we are going to use to make this design is a four -quadrant technique. We are going to design CMOS Analog multiplier using 28nm technology. Design and Implementation of this circuit will be done in Synopsys Custom design platform tool that is Synopsys custom design compiler tool.
An analog multiplier is basically a non-linear circuit. It is a device that contains two analog input signal and gives the product of both the input signal in its output. It is a circuit that basically gives the linear product of two continuous input signals in its output. If both the input and output signals are voltages let us say “V1” and “V2” be the input signal then in the output let’s say “Vout” it gives the product of both the input voltages divided by a scaling factor (say k). where k is the scaling factor that is any multiplication constant or a gain of suitable dimension.
Fig.1: Symbol of multiplier
Vout = (v1*v2)/k
It is used widely in the field of telecommunication, analog signal processing, Instrument systems etc. Analog multiplier is categorized as single quadrant which means that when both the input is positive/negative (i.e., same unipolar), two-quadrant means when one input has a positive voltage and other input could have positive or negative voltage (i.e., x is bipolar and y is unipolar), four-quadrant multiplier means when both the input is either positive or negative (i.e., when x is bipolar and y is also bipolar). So, in this paper, we are going to make the CMOS low power consumption four-quadrant analog multiplier. As, four-quadrant analog multiplier is a very useful basic building block in many circuits like adaptive filters, phase-frequency detection, frequency double, function generator, frequency shifters, etc. It is also used in modulation, pll (phase-locked loop), frequency mixer, frequency doubler, etc.
The main purpose of designing a four-quadrant analog multiplier is to eliminate extra voltage reference to make a compact circuit design. By implementing and simulating this circuit in Synopsys Custom compiler tool using CMOS 28nm Technology, the device performance, density and low power consumption will be improved and achieved. The proposed design consists of a pair of common source amplifier with input transistors and the output that it gives is the square function of its input voltages v1 and v2. It contains a total of 8 transistors in which all 8 are PMOS including two resistors R1 and R2 to make the transistor to work in the proper region and the value of resistors has to be taken accordingly at the time of the simulation. Transistor m1 to m8 acts as a non-linear cancellation path in a square root circuit. The output which comes from transistors are directly going into the square root circuit block to produce differential output voltage or current which is just the product of the input signal v12 and v34. Here, v12 is the difference between v1 and v2 signal while v34 is the difference between v3 and v4 input signal and the resultant output signal Vout will be the differential output of vout1 and vout2.
Fig.2: REFERENCE Four-Quadrant Analog Multiplier CIRCUIT
Hence, on observing the output waveform we conclude that the given circuit become capable to operate with the input voltage and also the requirement of low power consumption for operating the circuit is also achieved. So, a new square root circuit can be used to realize a CMOS four-quadrant analog multiplier has been given. For the verification purpose of the multiplier circuit, a performance simulation result has been given.
The Synopsys Custom Compiler™design environment is a modern solution for full-custom analog, custom digital, and mixed-signal IC design. As the heart of the Synopsys Custom Design Platform, Custom Compiler provides design entry, simulation management and analysis, and custom layout editing features. This tool is used to design the circuit on a transistor level.
Fig.3: Synopsys Custom Compiler
Fig.4: Custom compilier
• Synopsys PrimeWave:
PrimeWave™ Design Environment is a comprehensive and flexible environment for simulation setup and analysis of analog, RF, mixed-signal design, custom-digital and memory
designs within the Synopsys Custom Design Platform. This tool helped in various types of simulations of the above designed circuit.
• Synopsys 28nm PDK:
The Synopsys 28nm Process Design Kit(PDK) was used in creation and simulation of the above designed circuit.
For implementing the circuit first we need to create library for that there are several steps which we need to do for creating it. These steps are:-
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Go to "file" click on "new", click on "Library" as we need to create the library of our respective circuit , Give the name of the circuit according to your circuit or suitability which you want to create.
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After this select which library you want to insert in your design, For example As in my circuit I have to insert the 28nm PDK library so, I selected the "Tech Library" and then select the 28nm PDK library from the respective location.
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After this click on "OK"
Now, a library of the respective circuit is created Similarly, now we need to create the cell. For creating that Go to the cell column and do right-click , click on "New" now, give the name of the cell and Ok. Similarly, for creating a schematic of the circuit in the View column the same procedure has been followed as above.
Fig.5: Library manager
This is the schematic of Four-Quadrant Analog Multiplier in Synopsys custom compiler Tool which consist of 8 PMOS in which after the PMOS connections are complete I connected the 4 input labels that is v1,v2,v3 and v4 and 2 output labels Vout1 and Vout2 providng VDDA label for power supply and VSSA label for ground.
Fig.6: Four-Quadrant Analog Multiplier cell Schematic
This is the symbol of Four Quadrant Analog Multiplier as in this symbol the four circles which are shown indicates that there are 4 inputs sine signal which I have given (named v1,v2,v3 and v4) and the cross sign which is given in between the loop it means that it is the sign of multiplier indicating that it is multiplying the input signal and the output which comes as the multiplication of both the input is the resultant one which is going into the FQ_AM (Four Quadrant Analog Multiplier) . So, the whole symbol indicates that as this is the symbol of FOUR QUADRANT ANALOG MULTIPLIER which takes 4 signals as input and here In this I have given the 4 sine wave input signals which are going to multiply (Two sine wave input signals are multiplied with each other[v1 and v3] and the other two sine wave input signal [v2 and v4] are multiplied giving the respective output.) by the multiplier and giving the result of the multiplication of sine wave input signal.
Fig.7: Four-Quadrant Analog Multiplier cell Symbol
This is the testbench of Four Quadrant Analog Multiplier in which its symbol is used and in which the other external connections are provided. Here, the Sinewave signal is used for providing input to the multiplier and 3 Resistors are used named R1, R2 and R3 also Dc supply is given at 1.8v for providing power supply to the circuit and ground is provided at VSSA.
Fig.8: Testbench of cell Symbol(a)
Fig.9: Testbench of cell Symbol(b)
For carrying simulation process in this tool Prime Wave is used. After creating and saving & check the schematic go to 'Tools' and open 'Primewave' to start the simulation.
Fig.10: Primewave
In the Primewave select the 'model file' i.e the '28nm PDK's .lib file present in the HSPICE folder. Now you see that model file has been included, now the next step which we need to do now is to include the analysis
Fig.11: Model file
Once that model file has been included, then after this select the 'tran' analysis in the analysis window and give the 'Start Time', 'Time Step' and 'Stop Time' parameters and save it. Then add the outputs which needs to be plotted by selecting the nets from the design.
Fig.12: Analysis
Now, we need to save the testbench state for that Go to "Testbench" on the top left corner and then "click" on it then Go to "Save state", Press "OK" or hit "Enter".
Fig.13: Save Testbench State
For simulation and netlist Go to "Simulation" on the top left corner and then click on "Netlist and Run", the Respective Waveform has now been generated of Analog Multiplier also at the same time netlist was generated automatically. To see the netlist click on "netlist" and then go to "Display", text viewer will open in which the generated netlist has been displayed. Also, for the Log file go to simulation and then click on "Log File", the log file is displayed.
This is the output waveform.
Fig.14: waveform(a)
Fig.15: waveform(b)
And by observing the above waveform it is found that multiplication of two input sine waves produces the output waveform like Amplitude modulation so, we can conclude that it behaves or is considered as amplitude modulation or it is used in amplitude modulator which produces Amplitude Modulation which is basically the Double -Sideband Suppressed Carrier(that is DSB-SC).
From all this, what we observe is that a new fully differential four-quadrant analog multiplier is formed using CMOS by using the Gilbert cell technique which can be used for very low voltage and power applications. The designed CMOS four-quadrant multiplier has been represented which operate on a single 1.8v DC power supply. The advantage of this Multiplier is that it has low power consumption and it is also suitable for low supply voltages. The drawback in this circuit is that the linear input voltage range is small therefore the input voltage range can be extended using an active attenuator which attenuates the noise signal. However, it also degrades the SNR (that is signal to noise ratio)and linearity characteristics. But for future work, a new method should become or will be implemented or considered to increase the range of input voltage. Therefore, this proposed four-quadrant analog multiplier is expected to be used suitably in analog signal processing for example in portable communication equipment, handheld movie cameras, radio receivers, etc.
Refer to the netlist of the circuit here: Netlist
Refer to the log_file of the circuit here: Log_File
[1]. https://www.ijaiem.org/volume2issue7/IJAIEM-2013-07-16-049.pdf
[2]. https://aircconline.com/vlsics/V3N5/3512vlsics08.pdf
[4]. https://www.koreascience.or.kr/article/JAKO199911921383249.pdf
- Synopsys India
- Cloud Based Analog IC Design Hackathon
- Indian Institute Of Technology (IIT) Hyderabad
- Kunal Ghosh, Founder, VSD Corp. Pvt. Ltd
- VLSI System Design (VSD) Corp. Pvt. Ltd India
- SUMANTO KAR
- Sameer S Durgoji
• Vanshika Tanwar, B.Tech(ECE), Dronacharya Group of Institutions, Greater Nodia, Uttar Pradesh.