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1. 6T_SRAM_CELL 6T_SRAM_CELL Public

   Forked from bharath19-gs/6T_SRAM_CELL

   SRAM means Static Random Access Memory. The SRAM cell that we considered in this paper was 6T SRAM cell which consists of two crossly coupled inverters and access transistors to read and write the …

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2. dvsd_4bit_magnitude_comparator dvsd_4bit_magnitude_comparator Public

   About This project produced a clean GDS - Final Layout with all details that are used to print photomasks used in the fabrication of a behavioral RTL of an 4bit_magnitude_comparator, using SkyWater…

   Verilog

3. dvsd_cmp dvsd_cmp Public

   Verilog

4. dvsd_pe_sky130 dvsd_pe_sky130 Public

   Forked from Khalique13/dvsd_pe_sky130

   This project produced a clean GDS - Final Layout with all details that are used to print photomasks used in the fabrication of a behavioral RTL of an 8-bit Priority Encoder, using SkyWater 130 nm PDK.

   Verilog

5. Analog_multiplier Analog_multiplier Public

   This repository presents the design of Four-Quadrant Analog Multiplier implemented using Synopsys Custom Compiler Tool in 28nm Technology.

6. differential-end-csvco differential-end-csvco Public

   Forked from htrinath/differential-end-csvco

   This repository presents the design of Differential End Current Starved VCO implemented using Synopsys Custom Compiler on 28nm Technology