update documentation

Changelog.md

@@ -26,6 +26,10 @@
 
 * Relaxed requirement on `httpx` to include `0.28.X`, which has no removals
   compared to `0.27.0`.
+
+## Documentation
+
+* Clarified support for gzipped files in the Classic flow.
 
 # 2.3.1
 

docs/source/glossary.md

@@ -397,5 +397,23 @@ MPW
     of a wafer to be spread across multiple projects.
     
     {term}`OpenMPW` and {term}`chipIgnite` are examples of MPW projects.
+    
+dotlib
+
+    Also `.lib`.
+
+    A library format for macros including standard cells, modeling at an
+    abstract level the interface to and timing properties of a cell.
+    
+    Typically used for Synthesis and {term}`STA`.
+    
+Gzip
 
+    A free and open-source compression format. A great many number of tools
+    support Gzipped inputs transparently, i.e., any file beginning with the
+    bytes `1f 8b` is automatically decompressed without any special input
+    from the user.
+    
+    Gzipping is popular for text-heavy formats such as {term}`dotlib` or
+    {term}`SPEF` formats.
 ```

docs/source/usage/using_macros.md

@@ -56,7 +56,7 @@ views- the former of which is used in PnR and the latter is used for tape-out.
   * Used as a fallback during synthesis if neither Verilog headers nor regular
     netlists (`.gl.v`/`.nl.v`) exist. It is not recommended for this use as
     synthesis checks may fail.
-* Lib file (`.lib`): Optional
+* {term}`dotlib` file (`.lib`): Optional
   * May be used during STA (see [relevant section](#sta)).
   * Used as a last resort for synthesis if no Verilog header (`.vh`) or any
     netlists (`.nl.v`/`.gl.v`/`.pnl.v`) are available. It is not recommended for
@@ -83,13 +83,26 @@ thereof) and the values are a Python dataclass. You can find the API reference
 for the macros hashmap at {class}`openlane.common.Macro`, but a less mechanical
 explanation is as follows:
 
+```{tip}
+To save space in your repositories, {term}`Gzip`ped views may be supported
+depending on the flow. The Classic flow generally supports gzipping the
+following formats:
+
+* gds
+* lef
+* vh
+* lib
+* spef
+
+```
+
 * The keys contain the name of the Macro itself (not instances thereof.)
 * The values are:
   * A dictionary of instance names to instance objects
     * The instance objects in turn consist off:
       * `location`: A tuple of two numbers, in microns, indicating the location
         of the macro (optional)
-      * `orientation`: The orientation of the placed macro-- see page 250 of the
+      * `orientation`: The orientation of the placed macro-- see the
         {term}`LEFDEFREF` for a definition and visual.
   * `gds`: List of GDS files comprising the macro (usually only one)
   * `lef`: List of LEF files comprising the macro (usually only one)

openlane/steps/pyosys.py

@@ -557,6 +557,11 @@ class Synthesis(SynthesisCommon):
     * ``design__instance__count``
     * ``design__instance_unmapped__count``
     * ``design__instance__area``
+
+    Note that Yosys steps do not currently support gzipped standard cell dotlib
+    files. They are however supported for macros:
+
+    https://github.com/YosysHQ/yosys/issues/4830
     """
 
     id = "Yosys.Synthesis"
@@ -576,6 +581,11 @@ class Resynthesis(SynthesisCommon):
     * ``design__instance__count``
     * ``design__instance_unmapped__count``
     * ``design__instance__area``
+
+    Note that Yosys steps do not currently support gzipped standard cell dotlib
+    files. They are however supported for macros:
+
+    https://github.com/YosysHQ/yosys/issues/4830
     """
 
     id = "Yosys.Resynthesis"
@@ -600,6 +610,11 @@ class VHDLSynthesis(SynthesisCommon):
     * ``design__instance__count``
     * ``design__instance_unmapped__count``
     * ``design__instance__area``
+
+    Note that Yosys steps do not currently support gzipped standard cell dotlib
+    files. They are however supported for macros:
+
+    https://github.com/YosysHQ/yosys/issues/4830
     """
 
     id = "Yosys.VHDLSynthesis"