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Releases: foss-for-synopsys-dwc-arc-processors/riscv-isa-manual

Release riscv-isa-release-084b690-2024-10-23

23 Oct 08:00
084b690
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This release was created by: AFOliveira
Release of RISC-V ISA, built from commit 084b690, is now available.

Full Changelog: riscv-isa-release-1569c8d-2024-10-07...riscv-isa-release-084b690-2024-10-23

Release riscv-isa-release-1569c8d-2024-10-07

07 Oct 11:35
1569c8d
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This release was created by: AFOliveira
Release of RISC-V ISA, built from commit 1569c8d, is now available.

Full Changelog: riscv-isa-release-0594e18-2024-10-02...riscv-isa-release-1569c8d-2024-10-07

Release riscv-isa-release-0594e18-2024-10-02

02 Oct 08:59
0594e18
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This release was created by: AFOliveira
Release of RISC-V ISA, built from commit 0594e18, is now available.

Full Changelog: https://github.com/foss-for-synopsys-dwc-arc-processors/riscv-isa-manual/commits/riscv-isa-release-0594e18-2024-10-02

Release riscv-isa-release-3ec2f19-2024-08-16

16 Aug 14:05
3ec2f19
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This release was created by: AlfredoRodrigues4
Release of RISC-V ISA, built from commit 3ec2f19, is now available.

What's Changed

  • Added Per-Page Instruction Description for RV32I by @AFOliveira in #1

New Contributors

Full Changelog: https://github.com/foss-for-synopsys-dwc-arc-processors/riscv-isa-manual/commits/riscv-isa-release-3ec2f19-2024-08-16