Releases: foss-for-synopsys-dwc-arc-processors/riscv-isa-manual
Release riscv-isa-release-084b690-2024-10-23
This release was created by: AFOliveira
Release of RISC-V ISA, built from commit 084b690, is now available.
Full Changelog: riscv-isa-release-1569c8d-2024-10-07...riscv-isa-release-084b690-2024-10-23
Release riscv-isa-release-1569c8d-2024-10-07
This release was created by: AFOliveira
Release of RISC-V ISA, built from commit 1569c8d, is now available.
Full Changelog: riscv-isa-release-0594e18-2024-10-02...riscv-isa-release-1569c8d-2024-10-07
Release riscv-isa-release-0594e18-2024-10-02
This release was created by: AFOliveira
Release of RISC-V ISA, built from commit 0594e18, is now available.
Full Changelog: https://github.com/foss-for-synopsys-dwc-arc-processors/riscv-isa-manual/commits/riscv-isa-release-0594e18-2024-10-02
Release riscv-isa-release-3ec2f19-2024-08-16
This release was created by: AlfredoRodrigues4
Release of RISC-V ISA, built from commit 3ec2f19, is now available.
What's Changed
- Added Per-Page Instruction Description for RV32I by @AFOliveira in #1
New Contributors
- @AFOliveira made their first contribution in #1
Full Changelog: https://github.com/foss-for-synopsys-dwc-arc-processors/riscv-isa-manual/commits/riscv-isa-release-3ec2f19-2024-08-16