github-actions
released this
16 Aug 14:05
·
7 commits
to main
since this release
This release was created by: AlfredoRodrigues4
Release of RISC-V ISA, built from commit 3ec2f19, is now available.
What's Changed
- Added Per-Page Instruction Description for RV32I by @AFOliveira in #1
New Contributors
- @AFOliveira made their first contribution in #1
Full Changelog: https://github.com/foss-for-synopsys-dwc-arc-processors/riscv-isa-manual/commits/riscv-isa-release-3ec2f19-2024-08-16