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Enable Systrace/ATRACE in mesa on Android #144

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Commits on Jun 14, 2019

  1. gallium/winsys/kms: Fix dumb buffer bpp

    The bpp in the dumb buffer creation request is hardcoded to 32, which is an
    incorrect assumption as the caller is free to pick any pipe format. Use the
    bpp supplied to us through util_format_get_blocksizebits().
    
    Fixes: 3b176c4 "gallium: Add a dumb drm/kms winsys backed swrast provider"
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    Reviewed-by: Adam Jackson <ajax@redhat.com>
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    (cherry picked from commit ec0a68e)
    strassek authored and jasuarez committed Jun 14, 2019
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  2. st/mesa: Add rgbx handling for fp formats

    Add missing cases for fp32 and fp16 formats.
    
    Fixes: c68334f "st/mesa: add floating point formats in st_new_renderbuffer_fb()"
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    (cherry picked from commit 845ec85)
    strassek authored and jasuarez committed Jun 14, 2019
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  3. radv: Skip transitions coming from external queue.

    Transitions to external queue should do the transition & make sure
    it works on all queues.
    
    Fixes: 8ebc7dc "radv: Allow fast clears with concurrent queue mask for some layouts."
    Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    (cherry picked from commit 0667c1f)
    BNieuwenhuizen authored and jasuarez committed Jun 14, 2019
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  4. v3d: fix checking twice auf flag

    Seems a C&P error, and should check for auf/muf.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110902
    Fixes: 8f06559 "v3d: Add an optimization pass for redundant flags updates."
    
    Reviewed-by: Eric Anholt <eric@anholt.net>
    (cherry picked from commit 17c2c9c)
    infapi00 authored and jasuarez committed Jun 14, 2019
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  5. freedreno/a5xx: Fix indirect draw max_indices calculation

    The number of elements to draw should not be affected by the offset.
    
    A similar fix was submitted for a6xx at 79180a0.
    
    Fixes these dEQP tests on a5xx:
    
    dEQP-GLES31.functional.draw_indirect.compute_interop.large.drawelements_separate_grid_500x500_drawcount_8
    dEQP-GLES31.functional.draw_indirect.compute_interop.large.drawelements_separate_grid_500x500_drawcount_2500
    dEQP-GLES31.functional.draw_indirect.compute_interop.large.drawarrays_separate_grid_500x500_drawcount_2500
    dEQP-GLES31.functional.draw_indirect.compute_interop.large.drawarrays_combined_grid_500x500_drawcount_2500
    dEQP-GLES31.functional.draw_indirect.compute_interop.large.drawelements_combined_grid_500x500_drawcount_8
    dEQP-GLES31.functional.draw_indirect.compute_interop.large.drawelements_combined_grid_500x500_drawcount_2500
    
    Reviewed-by: Rob Clark <robdclark@gmail.com>
    (cherry picked from commit 3fb7b1f)
    elima authored and jasuarez committed Jun 14, 2019
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  6. intel/dump: fix segfault when the app hasn't accessed the device

    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
    (cherry picked from commit f80679c)
    llandwerlin-intel authored and jasuarez committed Jun 14, 2019
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Commits on Jun 17, 2019

  1. i965: support UYVY for external import only

    It is similar with YUYV
    
    Fixes: 165e704 ("i965/i915: Add UYVY as the supported format")
    Signed-off-by: Haihao Xiang <haihao.xiang@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    (cherry picked from commit 8ead5be)
    xhaihao authored and jasuarez committed Jun 17, 2019
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Commits on Jun 18, 2019

  1. radv: Decompress DCC when the image format is not allowed for buffers.

    Otherwise the buffer loads/stores in the bufimage meta operations fail.
    
    If we decompress DCC then we can use the "canonical" format compatible
    with the not-supported format.
    
    CC: <mesa-stable@lists.freedesktop.org>
    Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    (cherry picked from commit 4107590)
    BNieuwenhuizen authored and jasuarez committed Jun 18, 2019
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  2. virgl: Assume sRGB write control for older guest kernels or virglrend…

    …erer hosts
    
    When the host virglrenderer is an older version that doesn't check the sRGB write
    control feature, or when the guest kernel doesn't support CAPS v2, then the guest
    will only report support for GL 2.1 on a GL 3.3 host, even though it was supporting
    3.3 with earlier guest mesa versions.
    
    By also checking the host feature check version this regression can be avoided.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110921
    Fixes: 2845939
       virgl: Set sRGB write control CAP based on host capabilities
    
    Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
    Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
    (cherry picked from commit 2b87753)
    gerddie authored and jasuarez committed Jun 18, 2019
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  3. anv: Set STATE_BASE_ADDRESS upper bounds on gen7

    This should fix floating-point border color on all gen7 HW.  Integer is
    still thoroughly busted on gen7 because it doesn't exist on IVB and it's
    crazy on HSW.
    
    Cc: mesa-stable@lists.freedesktop.org
    Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
    (cherry picked from commit 9672b70)
    gfxstrand authored and jasuarez committed Jun 18, 2019
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  4. glsl: Fix out of bounds read in shader_cache_read_program_metadata

    The VaryingNames array has NumVaryings entries.  But BufferStride is
    a small array of MAX_FEEDBACK_BUFFERS (4) entries.  Programs with
    more than 4 varyings would read out of bounds.
    
    Also, BufferStride is set based on the shader itself, which means that
    it's inherently already included in the hash, and doesn't need to be
    included again.  At the point when shader_cache_read_program_metadata
    is called, the linker hasn't even set those fields yet.  So, just drop
    it entirely.
    
    Fixes valgrind errors in KHR-GL45.transform_feedback.linking_errors_test.
    
    Fixes: 6d83094 glsl/shader_cache: Allow shader cache usage with transform feedback
    
    Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
    (cherry picked from commit 3c10a27)
    kaydenl authored and jasuarez committed Jun 18, 2019
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  5. freedreno/a6xx: un-swap X24S8_UINT

    The stencil is actually in the .w component, but we used to use SWAP to
    remap the channels.  This doesn't work when tiled/ubwc.
    
    Fixes:
      dEQP-GLES31.functional.stencil_texturing.format.depth24_stencil8_2d_array
      dEQP-GLES31.functional.stencil_texturing.format.depth24_stencil8_cube
      dEQP-GLES31.functional.stencil_texturing.format.stencil_index8_2d_array
      dEQP-GLES31.functional.stencil_texturing.format.stencil_index8_cube
      dEQP-GLES31.functional.stencil_texturing.misc.base_level
      dEQP-GLES31.functional.texture.border_clamp.formats.stencil_index8.nearest_size_pot
      dEQP-GLES31.functional.texture.border_clamp.formats.stencil_index8.nearest_size_npot
      dEQP-GLES31.functional.texture.border_clamp.formats.depth24_stencil8_sample_stencil.nearest_size_pot
      dEQP-GLES31.functional.texture.border_clamp.formats.depth24_stencil8_sample_stencil.nearest_size_npot
      dEQP-GLES31.functional.texture.border_clamp.sampler.uint_stencil
    
    Signed-off-by: Rob Clark <robdclark@chromium.org>
    (cherry picked from commit 4e72abc)
    robclark authored and jasuarez committed Jun 18, 2019
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Commits on Jun 19, 2019

  1. nouveau: fix frees in unsupported IR error paths.

    This is pointless in that we won't ever hit those paths in real life,
    but coverity complains.
    
    Fixes: f014ae3 ("nouveau: add support for nir")
    Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
    (cherry picked from commit 93ba356)
    airlied authored and jasuarez committed Jun 19, 2019
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  2. egl: Don't add hardware device if there is no render node v2.

    Do not offer a hardware drm backed egl device if no render node
    is available. The current implementation will fail on this
    egl device. On top it issues a warning that is actually missleading.
    There are finally more error paths that can fail on the way to a
    hardware backed egl device. Fixing all of them would kind of require
    opening the drm device and see if there is a usable driver associated
    with the device. The taken approach avoids a full probe and fixes at
    least this kind of problem on kvm virtualization hosts I observe here.
    
    Fixes: dbb4457 ("egl: add EGL_EXT_device_drm support")
    Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
    Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
    (cherry picked from commit 5743a36)
    mathias-froehlich authored and jasuarez committed Jun 19, 2019
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  3. radv: fix FMASK expand with SRGB formats

    Found while working on DCC for MSAA.
    
    Fixes: 6b97602 ("radv: add support for FMASK expand")
    Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
    (cherry picked from commit a7f7537)
    hakzsam authored and jasuarez committed Jun 19, 2019
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Commits on Jun 20, 2019

  1. radv: Fix vulkan build in meson.

    Apparently the android part was never ported to meson.
    
    CC: <mesa-stable@lists.freedesktop.org>
    Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    (cherry picked from commit 4c300bd)
    BNieuwenhuizen authored and jasuarez committed Jun 20, 2019
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  2. anv: Fix vulkan build in meson.

    Apparently the android part was never ported to meson.
    
    CC: <mesa-stable@lists.freedesktop.org>
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    (cherry picked from commit 755c633)
    BNieuwenhuizen authored and jasuarez committed Jun 20, 2019
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  3. meson: Allow building radeonsi with just the android platform.

    Just as was allowed by autotools.
    
    Fixes: 108d257 "meson: build libEGL"
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    (cherry picked from commit d1c0483)
    BNieuwenhuizen authored and jasuarez committed Jun 20, 2019
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Commits on Jun 21, 2019

  1. radv: disable viewport clamping even if FS doesn't write Z

    This fixes new CTS dEQP-VK.pipeline.depth_range_unrestricted.*.
    
    Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
    (cherry picked from commit 0a313cc)
    hakzsam authored and jasuarez committed Jun 21, 2019
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  2. glx: fix glvnd pointer types

    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110709
    Fixes: 22a9e00 ("glx: Implement the libglvnd interface.")
    Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
    Reviewed-by: Eric Anholt <eric@anholt.net>
    (cherry picked from commit 65b016b)
    1ace authored and jasuarez committed Jun 21, 2019
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  3. iris: Fix iris_flush_and_dirty_history to actually dirty history.

    When I split iris_flush_and_dirty_history into two helper functions,
    I accidentally made it stop dirtying.  Which was...sort of the point.
    
    Fixes: 21688a3 iris: Split iris_flush_and_dirty_for_history into two helpers.
    (cherry picked from commit 64fb20e)
    [Juan A. Suarez: resoved trivial conflicts]
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    
    Conflicts:
    	src/gallium/drivers/iris/iris_resource.c
    kaydenl authored and jasuarez committed Jun 21, 2019
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  4. util/os_file: resize buffer to what was actually needed

    Fixes: 3169647 "util: add os_read_file() helper"
    Reported-by: Jason Ekstrand <jason@jlekstrand.net>
    Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
    Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
    Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
    (cherry picked from commit 955c63d)
    1ace authored and jasuarez committed Jun 21, 2019
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Commits on Jun 25, 2019

  1. Update version to 19.1.1

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Jun 25, 2019
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  2. docs: add release notes for 19.1.1

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Jun 25, 2019
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  3. docs: add sha256 checksums for 19.1.1

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Jun 25, 2019
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  4. freedreno: Fix UBO load range detection on booleans.

    NIR 1-bit bool dests will have a bit size of 1, and thus a calculated
    "bytes" of 0.  load_ubo is always loading from dwords in the source.
    
    Fixes: 893425a ("freedreno/ir3: Push UBOs to constant file")
    Reviewed-by: Rob Clark <robdclark@gmail.com>
    (cherry picked from commit 5e7c96b)
    anholt authored and jasuarez committed Jun 25, 2019
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  5. freedreno: Fix up end range of unaligned UBO loads.

    We need the constants uploaded to cover the NIR offset plus the size,
    not the aligned-down start of our upload range plus the size.  Fixes
    mistaken UBO analysis with mat3 loads.
    
    Fixes: 893425a ("freedreno/ir3: Push UBOs to constant file")
    Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
    Reviewed-by: Rob Clark <robdclark@gmail.com>
    (cherry picked from commit 56842d3)
    anholt authored and jasuarez committed Jun 25, 2019
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  6. anv: Add HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED in vk_format

    When HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED is used, then the platform
    gralloc module will select a format based on the usage flags provided by
    the camera device and the other endpoint of the stream.
    
    The patch fixes crash in vulkan when the test is run with camera stream
    set to HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED.
    
    Test: android.graphics.cts.CameraVulkanGpuTest#testCameraImportAndRendering
    on chromebook with camera HAL3.
    
    v2: use AHARDWAREBUFFER_FORMAT_IMPLEMENTATION_DEFINED and take
        AHARDWAREBUFFER_USAGE_CAMERA_MASK in to account (Gurchetan)
    
    Fixes: f1654fa "anv/android: support creating images from external format"
    Signed-off-by: Nataraj Deshpande <nataraj.deshpande@intel.com>
    Signed-off-by: Gurchetan Singh <gurchetansingh@chromium.org>
    Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
    Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
    Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
    Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Acked-by: Jason Ekstrand <jason@jlekstrand.net>
    (cherry picked from commit d94fca5)
    nvdeshpande authored and jasuarez committed Jun 25, 2019
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  7. glsl: Don't increase the iteration count when there are no terminators

    Incrementing the iteration count was intended to fix an off-by-one error
    when the first terminator was superseded by a later terminator.  If
    there is no first terminator or later terminator, there is no off-by-one
    error.  Incrementing the loop count creates one.  This can be seen in
    loops like:
    
        do {
            if (something) {
                // No breaks or continues here.
            }
        } while (false);
    
    Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
    Tested-by: Abel Briggs <abelbriggs1@hotmail.com>
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110953
    Fixes: 646621c ("glsl: make loop unrolling more like the nir unrolling path")
    (cherry picked from commit ee1c69f)
    ianromanick authored and jasuarez committed Jun 25, 2019
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  8. freedreno/a5xx: fix batch leak in fd5 blitter path

    Fixes: 3d19892 freedreno: use fd_bc_alloc_batch instead of fd_batch_create.
    Signed-off-by: Rob Clark <robdclark@chromium.org>
    (cherry picked from commit 927fb50)
    robclark authored and jasuarez committed Jun 25, 2019
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  9. anv/cmd_buffer: Reuse gen8 Cmd{Set, Reset}Event on gen7

    Modern DXVK requires event support [1], but looks like it only
    uses vkCmdSetEvent() + vkGetEventStatus(). So we can just
    borrow the relevant code from gen8, leaving CmdWaitEvents still
    unimplemented.
    
    [1] doitsujin/dxvk@8c3900c
    
    v2: Also move CmdWaitEvents into genX_cmd_buffer.c (Jason)
    
    Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
    (cherry picked from commit 6230bfe)
    vsyrjala authored and jasuarez committed Jun 25, 2019
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Commits on Jun 26, 2019

  1. anv/descriptor_set: Only write texture swizzles if we have an image view

    When immutable samplers are set we call write_image_view with a NULL
    image view.  This causes issues on IVB where we have to fake texture
    swizzling.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110999
    Fixes: d2aa65e "anv: Emulate texture swizzle in the shader when..."
    (cherry picked from commit 0a364a4)
    gfxstrand authored and jasuarez committed Jun 26, 2019
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  2. i965: leaking of upload-BO with push constants

    In case of any enabled VS members from: uses_firstvertex,
    uses_baseinstance, uses_drawid, uses_is_indexed_draw
    leaks may happens.
    Call gen6_upload_push_constants allocates
    stage_stat->push_const_bo. It than takes pointer from
    push_const_bo to draw_params_bo (in the call
    brw_prepare_shader_draw_parameters by brw_upload_data)
    and do reference which finally haven't got unreferenced.
    
    Fixes leak:
     136 bytes in 1 blocks are definitely lost in loss record 6 of 13
        at 0x4C31B25: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
        by 0xC2B64B7: bo_alloc_internal (brw_bufmgr.c:596)
        by 0xC2B6748: brw_bo_alloc (brw_bufmgr.c:672)
        by 0xC314BB3: brw_upload_space (intel_upload.c:88)
        by 0xC2EBBC5: gen6_upload_push_constants (gen6_constant_state.c:155)
        by 0xC9E4FA6: gen9_upload_vs_push_constants (genX_state_upload.c:3300)
        by 0xC2E0EDA: check_and_emit_atom (brw_state_upload.c:540)
        by 0xC2E0EDA: brw_upload_pipeline_state (brw_state_upload.c:659)
        by 0xC2E0FF1: brw_upload_render_state (brw_state_upload.c:681)
        by 0xC2C5D2D: brw_draw_single_prim (brw_draw.c:1052)
        by 0xC2C62CB: brw_draw_prims (brw_draw.c:1175)
        by 0xC488AD1: vbo_exec_vtx_flush (vbo_exec_draw.c:386)
        by 0xC485270: vbo_exec_FlushVertices_internal (vbo_exec_api.c:652)
    
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Reported-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
    Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
    (cherry picked from commit 1931c97)
    Sergii Romantsov authored and jasuarez committed Jun 26, 2019
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  3. glsl: Fix round64 conversion function

    Fix round64 function to handle round to nearest even cases specially
    with positive and negative numbers with fraction part 0.5.
    
    v2: 1) Simplify unused bits (Elie Tournier)
    
    Fixes:
       KHR-GL45.gpu_shader_fp64.builtin.round_dvec2
       KHR-GL45.gpu_shader_fp64.builtin.round_dvec3
       KHR-GL45.gpu_shader_fp64.builtin.round_dvec4
       KHR-GL45.gpu_shader_fp64.builtin.roundeven_double
       KHR-GL45.gpu_shader_fp64.builtin.roundeven_dvec2
       KHR-GL45.gpu_shader_fp64.builtin.roundeven_dvec3
       KHR-GL45.gpu_shader_fp64.builtin.roundeven_dvec4
    
    Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
    Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
    Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
    (cherry picked from commit 06807e1)
    sagarghuge20 authored and jasuarez committed Jun 26, 2019
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Commits on Jun 28, 2019

  1. intel/compiler: fix derivative on y axis implementation

    This rewrites the ddy in EXECUTE_4 mode with a loop to make it more
    obvious what is going on and also sets the group each of the 4 threads
    in the groups are supposed to execute.
    
    Fixes the following CTS tests :
    
       dEQP-VK.glsl.derivate.dfdyfine.dynamic_*
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Co-Authored-by: Jason Ekstrand <jason@jlekstrand.net>
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    Fixes: 2134ea3 ("intel/compiler/fs: Implement ddy without using align16 for Gen11+")
    (cherry picked from commit 8362258)
    llandwerlin-intel authored and jasuarez committed Jun 28, 2019
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  2. meson: Add support for using cmake for finding LLVM

    Meson has support for using cmake as a finder for some dependencies,
    including LLVM. Using cmake has a lot of advantages: it needs less meson
    maintenance to keep working (even for llvm updates); it works more
    sanely for cross compiles (as llvm-config is a compiled binary not a
    shell script). Meson 0.51.0 also has a new generic variable getter that
    can be used to get information from either cmake, pkg-config, or
    config-tools dependencies, which is needed for cmake. We continue to
    support using llvm-config if you don't have cmake installed, or if cmake
    cannot find a suitable version.
    
    Fixes: 0d59459
           ("meson: Force the use of config-tool for llvm")
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    (cherry picked from commit 5157a42)
    dcbaker authored and jasuarez committed Jun 28, 2019
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  3. iris: Enable PIPE_CAP_SURFACE_REINTERPRET_BLOCKS

    This makes CompressedTexSubImage from a PBO source do proper GPU
    rendering to upload instead of stalling to map the PBO source on
    the CPU (then copying it on the CPU).
    
    Thanks Bas Nieuwenhuizen for pointing out that Vulkan includes this
    functionality, and to Jason Ekstrand for writing the code I adapted.
    Vulkan only supports a single layer, however, and this code tries to
    support multiple layers as long as it's miplevel 0.
    
    Improves performance in Sid Meier's Civilization VI:
    
       Average frame time (ms):         -3.67423% +/- 1.46201% (n=5)
       99th percentile frame time (ms): -5.09910% +/- 3.87874% (n=5)
    
    (cherry picked from commit a032a96)
    kaydenl authored and jasuarez committed Jun 28, 2019
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  4. intel: Add and use helpers for level0 extent

    Prepare for a bug fix by adding and using helpers which convert
    isl_surf::logical_level0_px and isl_surf::phys_level0_sa to units of
    surface elements.
    
    v2:
    - Update iris (Ken).
    - Update anv.
    
    Cc: <mesa-stable@lists.freedesktop.org>
    Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
    (cherry picked from commit fb1350c)
    nchery-intel authored and jasuarez committed Jun 28, 2019
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  5. isl: Don't align phys_level0_sa by block dimension

    Aligning phys_level0_sa by the compression block dimension prior to
    mipmap layout causes the layout of compressed surfaces to differ from
    the sampler's expectations in certain cases. The hardware docs agree:
    
    From the BDW PRM, Vol. 5, Compressed Mipmap Layout,
    
       The compressed mipmaps are stored in a similar fashion to
       uncompressed mipmaps [...]
    
       The following exceptions apply to the layout of compressed (vs.
       uncompressed) mipmaps:
          * [...]
          * The dimensions of the mip maps are first determined by applying
    	the sizing algorithm presented in Non-Power-of-Two Mipmaps
    	above. Then, if necessary, they are padded out to compression
    	block boundaries.
    
    The last bullet indicates that alignment should not be done for
    calculating a miplevel's dimensions, but rather for determining miplevel
    placement/padding. Comply with this text by removing the extra
    alignment.
    
    Fixes some fbo-generatemipmap-formats piglit failures on all tested
    platforms (SNB-KBL).
    
    v2:
    - Note fixed platforms.
    - Update some consumers via a helper function.
    
    Cc: <mesa-stable@lists.freedesktop.org>
    Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
    (cherry picked from commit 02f6995)
    nchery-intel authored and jasuarez committed Jun 28, 2019
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  6. gallium: Make util_copy_image_view handle shader_access

    A while back, we added a new field, but failed to update the copier.
    I believe iris is the only current user of the new field, and it hasn't
    used the copier, so noone noticed.
    
    Fixes: 8b626a2 st/mesa: Record shader access qualifiers for images
    Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
    (cherry picked from commit 255c71e)
    kaydenl authored and jasuarez committed Jun 28, 2019
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  7. radv: only enable VK_AMD_gpu_shader_{half_float,int16} on GFX9+

    These two extensions are supported on GFX8 but the throughput
    of 16-bit floats/integers is same as 32-bit. Also, shaderInt16
    is only enabled on GFX9+ for the same reason, be more consistent.
    
    This fixes a crash with Wolfenstein II because it expects
    shaderInt16 to be enabled when VK_AMD_gpu_shader_half_float is
    exposed. Note that AMDVLK only enables these extensions on GFX9+.
    
    Cc: 19.1 <mesa-stable@lists.freedesktop.org>
    Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
    (cherry picked from commit ef1787d)
    [Juan A. Suarez: resolve trivial conflicts]
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    
    Conflicts:
    	src/amd/vulkan/radv_extensions.py
    hakzsam authored and jasuarez committed Jun 28, 2019
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Commits on Jul 1, 2019

  1. meson: bump required libdrm version to 2.4.81

    dbb4457 started using drmDevicesEqual(), which was
    introduced in libdrm 2.4.81
    
    We could either copy the function locally, or bump the required version.
    Since the function is non-trivial and 2.4.81 is old enough already,
    I suggesting the latter.
    
    Fixes: dbb4457 ("egl: add EGL_EXT_device_drm support")
    Cc: Emil Velikov <emil.velikov@collabora.com>
    Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
    Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
    Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
    
    
    (cherry picked from commit 5819bc0)
    1ace authored and jasuarez committed Jul 1, 2019
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  2. mesa: delete framebuffer texture attachment sampler views

    When a context is destroyed the destroy_tex_sampler_cb makes sure that all the
    sampler views created by that context are destroyed.
    This is done by walking the ctx->Shared->TexObjects hash table.
    
    In a multiple context environment the texture can be deleted by a different context,
    so it will be removed from the TexObjects table and will prevent the above mechanism
    to work.
    This can result in an assertion in st_save_zombie_sampler_view because the
    sampler_view owns a reference to a destroyed context.
    
    This issue occurs in blender 2.80.
    
    This commit fixes this by explicitly releasing sampler_view created by the destroyed
    context for all texture attachments.
    
    Fixes: 593e36f (st/mesa: implement "zombie" sampler views (v2))
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110944
    Signed-off-by: Marek Olšák <marek.olsak@amd.com>
    (cherry picked from commit c37f03d)
    peppsac authored and jasuarez committed Jul 1, 2019
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  3. radeon/uvd: fix calc_ctx_size_h265_main10

    Left shift was applied twice.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110702
    
    Reviewed-by: Leo Liu <leo.liu@amd.com>
    Tested-by: <irherder@gmail.com>
    Signed-off-by: Marek Olšák <marek.olsak@amd.com>
    Cc: <mesa-stable@lists.freedesktop.org>
    (cherry picked from commit c81c784)
    peppsac authored and jasuarez committed Jul 1, 2019
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  4. Revert "i965/icl: Add WA_2204188704 to disable pixel shader panic dis…

    …patch"
    
    SLICE_COMMON_CHICKEN3 is a privileged register not accesible from userspace.
    This patch silences a simulator warning about it.
    
    We don't need to add this workaround in linux kernel as the WA description
    says it's fixed on latest stepping.
    
    This reverts commit 85ecd14.
    
    Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    (cherry picked from commit 7746d4e)
    aphogat authored and jasuarez committed Jul 1, 2019
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  5. Revert "anv/icl: Add WA_2204188704 to disable pixel shader panic disp…

    …atch"
    
    SLICE_COMMON_CHICKEN3 is a privileged register not accesible from userspace.
    This patch silences a simulator warning about it.
    
    We don't need to add this workaround in linux kernel as the WA description
    says it's fixed on latest stepping.
    
    This reverts commit 2be60e0.
    
    Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    (cherry picked from commit 387e43b)
    aphogat authored and jasuarez committed Jul 1, 2019
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  6. Revert "iris/icl: Add WA_2204188704 to disable pixel shader panic dis…

    …patch"
    
    SLICE_COMMON_CHICKEN3 is a privileged register not accesible from userspace.
    This patch silences a simulator warning about it.
    
    We don't need to add this workaround in linux kernel as the WA description
    says it's fixed on latest stepping.
    
    This reverts commit 9c421d6.
    
    Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    (cherry picked from commit d96cba7)
    aphogat authored and jasuarez committed Jul 1, 2019
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  7. Revert "meson: Add support for using cmake for finding LLVM"

    This reverts commit 5157a42.
    
    There is a meson bug that causes llvm to always be statically linked,
    which is obviously not what we want. I haven't had time to look into it
    yet, but for now let's just revert it.
    
    (cherry picked from commit 97c2c45)
    dcbaker authored and jasuarez committed Jul 1, 2019
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  8. intel/compiler: don't use byte operands for src1 on ICL

    The simulator complains about using byte operands, we also have
    documentation telling us.
    
    Note that add operations on bytes seems to work fine on HW (like ADD).
    Using dwords operands with CMP & SEL fixes the following tests :
    
       dEQP-VK.spirv_assembly.type.vec*.i8.*
    
    v2: Drop the GLK changes (Matt)
        Add validator tests (Matt)
    
    v3: Drop GLK ref (Matt)
        Don't mix float/integer in MAD (Matt)
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com> (v1)
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    BSpec: 3017
    Cc: <mesa-stable@lists.freedesktop.org>
    (cherry picked from commit 5847de6)
    llandwerlin-intel authored and jasuarez committed Jul 1, 2019
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  9. gallium: Add CAP for opcode DIV

    Not all drivers support TGSI_OPCODE_DIV, so we should have a cap to be able
    to check this.
    
    Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    (cherry picked from commit 843723e)
    [Juan A. Suarez: resolve trivial conflicts]
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    
    Conflicts:
    	src/gallium/docs/source/screen.rst
    	src/gallium/include/pipe/p_defines.h
    gerddie authored and jasuarez committed Jul 1, 2019
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  10. vl: Use CS composite shader only if TEX_LZ and DIV are supported

    Enable the compute shader copositer only when TEX_LZ is supported by the driver.
    
    v2: Also check whether DIV is supported.
    
    https://bugs.freedesktop.org/show_bug.cgi?id=110783
    
    Fixes: 9364d66
     gallium/auxiliary/vl: Add video compositor compute shader render
    
    Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    (cherry picked from commit 75d8b4e)
    gerddie authored and jasuarez committed Jul 1, 2019
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  11. meson: GNU/kFreeBSD has DRM/KMS and requires -D_GNU_SOURCE

    This is a regression from the old autotools build system.
    
    Acked-by: Eric Engestrom <eric.engestrom@intel.com>
    Acked-by: Dylan Baker <dylan@pnwbakers.com>
    (cherry picked from commit 7389bf9)
    jrtc27 authored and jasuarez committed Jul 1, 2019
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Commits on Jul 2, 2019

  1. radv: Only allocate supplied number of descriptors when variable.

    Fixes: b5e04e9 "radv: Support allocating variable size descriptor sets."
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111019
    Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    (cherry picked from commit d7e6541)
    BNieuwenhuizen authored and jasuarez committed Jul 2, 2019
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  2. util: Heap-allocate 256K zlib buffer

    The disk cache code tries to allocate a 256 Kbyte buffer on the stack.
    Since musl only gives 80 Kbyte of stack space per thread, this causes a
    trap.
    
    See https://wiki.musl-libc.org/functional-differences-from-glibc.html#Thread-stack-size
    
    (In musl-1.1.21 the default stack size has increased to 128K)
    
    [mattst88]: Original author unknown, but I think this is small enough
                that it is not copyrightable.
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    Reviewed-by: Eric Anholt <eric@anholt.net>
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    
    (cherry picked from commit fd7b7f1)
    anarchpenguin authored and jasuarez committed Jul 2, 2019
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  3. meson: Search for execinfo.h

    Rather than checking __GLIBC__/__UCLIBC__ macros as a proxy for
    execinfo.h presence, just check directly. This allows the build to work
    on musl.
    
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    Reviewed-by: Eric Anholt <eric@anholt.net>
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    (cherry picked from commit 10e8d46)
    anarchpenguin authored and jasuarez committed Jul 2, 2019
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  4. meson: Improve detection of Python when using Meson >=0.50.

    Previously, on systems where multiple versions of Python 3 (e.g. 3.6 and 3.7)
    are installed, wrong version of Python 3 could have been used.
    
    The proper fix requires availability of path() method in Meson's python
    module, which has been added in Meson 0.50:
    mesonbuild/meson#4616
    
    Distro Bug: https://bugs.gentoo.org/671308
    Signed-off-by: Arfrever Frehtes Taifersar Arahesis <Arfrever@Apache.Org>
    Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
    
    v2: - Add missing `endif` keyword (Dylan)
    (cherry picked from commit b120a02)
    Arfrever Frehtes Taifersar Arahesis authored and jasuarez committed Jul 2, 2019
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Commits on Jul 3, 2019

  1. spirv: Ignore ArrayStride in OpPtrAccessChain for Workgroup

    From OpPtrAccessChain description in the SPIR-V spec (1.4 rev 1):
    
        For objects in the Uniform, StorageBuffer, or PushConstant storage
        classes, the element’s address or location is calculated using a
        stride, which will be the Base-type’s Array Stride when the Base
        type is decorated with ArrayStride. For all other objects, the
        implementation will calculate the element’s address or location.
    
    For non-CL shaders the driver should layout the Workgroup storage
    class, so override any explicitly set ArrayStride in the shader.  This
    currently fixes only the lower_workgroup_access_to_offsets case, which
    is used by anv.
    
    Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
    (cherry picked from commit 050eb63)
    cmarcelo authored and jasuarez committed Jul 3, 2019
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Commits on Jul 4, 2019

  1. intel: fix wrong format usage

    Do not use the view format when filling the surface state.
    
    Fixes dEQP-VK.image.texel_view_compatible.compute.extended.texture.*
    
    Fixes: fb1350c ("intel: Add and use helpers for level0 extent")
    
    Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    (cherry picked from commit e06bc0b)
    jasuarez committed Jul 4, 2019
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  2. radv: Fix interactions between variable descriptor count and inline u…

    …niform blocks.
    
    Fixes: d7e6541 "radv: Only allocate supplied number of descriptors when variable."
    Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    (cherry picked from commit 8a05325)
    BNieuwenhuizen authored and jasuarez committed Jul 4, 2019
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Commits on Jul 5, 2019

  1. iris: Use a uint16_t for key sizes

    sizeof(struct brw_vs_prog_key) == 324.
    
    Cc: mesa-stable@lists.freedesktop.org
    Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
    (cherry picked from commit 4633298)
    gfxstrand authored and jasuarez committed Jul 5, 2019
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Commits on Jul 9, 2019

  1. Update version to 19.1.2

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Jul 9, 2019
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  2. docs: add release notes for 19.1.2

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Jul 9, 2019
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  3. docs: add sha256 checksums for 19.1.2

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Jul 9, 2019
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  4. vulkan/overlay: fix command buffer stats

    Begin/Reset of command buffer both reset the content of the command
    buffer. Don't forget to wipe them on Begin.
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: 4438188 ("vulkan/overlay: record stats in command buffers and accumulate on exec/submit")
    Acked-by: Eric Engestrom <eric.engestrom@intel.com>
    Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
    (cherry picked from commit 8f0f727)
    llandwerlin-intel authored and jasuarez committed Jul 9, 2019
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  5. radv: Handle cmask being disallowed by addrlib.

    alignment=0 does weird things with align64.
    
    CC: <mesa-stable@lists.freedesktop.org>
    Reviewed-by: Dave Airlie <airlied@redhat.com>
    (cherry picked from commit e46b41b)
    BNieuwenhuizen authored and jasuarez committed Jul 9, 2019
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  6. anv: fix VkExternalBufferProperties for unsupported handles

    compatibleHandleTypes must include the queried handle type.
    
    Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
    Cc: <mesa-stable@lists.freedesktop.org>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    (cherry picked from commit f3c7a02)
    olvaffe authored and jasuarez committed Jul 9, 2019
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  7. anv: fix VkExternalBufferProperties for host allocation

    It was reported as unsupported previously.  It should be importable
    and is compatible with itself.
    
    Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
    Fixes: 69cc627 ("anv: Implement VK_EXT_external_memory_host")
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    (cherry picked from commit 5824130)
    olvaffe authored and jasuarez committed Jul 9, 2019
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  8. intel/vec4: Reswizzle VF immediates too

    Previously, an instruction like
    
    mul(8) vgrf29.xy:F, vgrf25.yxxx:F, [-1F, 1F, 0F, 0F]
    
    would get rewritten as
    
    mul(8) vgrf0.yz:F, vgrf25.yyxx:F, [-1F, 1F, 0F, 0F]
    
    The latter does not produce the correct result.  The VF immediate in the
    second should be either [-1F, -1F, 1F, 1F] or [0F, -1F, 1F, 0F].  This
    commit produces the former.
    
    Fixes: 1ee1d8a ("i965/vec4: Reswizzle sources when necessary.")
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    (cherry picked from commit 47c2aa5)
    ianromanick authored and jasuarez committed Jul 9, 2019
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  9. nir: Add unit tests for nir_opt_comparison_pre

    Each tests has a comment with the expected before and after NIR.  The
    tests don't actually check this.  The tests only check whether or not
    the optimization pass reported progress.  I couldn't think of a robust,
    future-proof way to check the before and after code.
    
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    (cherry picked from commit b08d704)
    ianromanick authored and jasuarez committed Jul 9, 2019
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  10. nir: Use nir_src_bit_size instead of alu1->dest.dest.ssa.bit_size

    This is important because, for example nir_op_fne has
    dest.dest.ssa.bit_size == 1, but the source operands can be 16-, 32-, or
    64-bits.  Fixing this helps partial redundancy elimination for compares
    in a few more shaders.
    
    v2: Add unit tests for nir_opt_comparison_pre that are fixed by this
    commit.
    
    All Intel platforms had similar results.
    total instructions in shared programs: 17179408 -> 17179081 (<.01%)
    instructions in affected programs: 43958 -> 43631 (-0.74%)
    helped: 118
    HURT: 2
    helped stats (abs) min: 1 max: 5 x̄: 2.87 x̃: 2
    helped stats (rel) min: 0.06% max: 4.12% x̄: 1.19% x̃: 0.81%
    HURT stats (abs)   min: 6 max: 6 x̄: 6.00 x̃: 6
    HURT stats (rel)   min: 5.83% max: 6.06% x̄: 5.94% x̃: 5.94%
    95% mean confidence interval for instructions value: -3.08 -2.37
    95% mean confidence interval for instructions %-change: -1.30% -0.85%
    Instructions are helped.
    
    total cycles in shared programs: 360959066 -> 360942386 (<.01%)
    cycles in affected programs: 774274 -> 757594 (-2.15%)
    helped: 111
    HURT: 4
    helped stats (abs) min: 1 max: 1591 x̄: 169.49 x̃: 36
    helped stats (rel) min: <.01% max: 24.43% x̄: 8.86% x̃: 2.24%
    HURT stats (abs)   min: 1 max: 2068 x̄: 533.25 x̃: 32
    HURT stats (rel)   min: 0.02% max: 5.10% x̄: 3.06% x̃: 3.56%
    95% mean confidence interval for cycles value: -200.61 -89.47
    95% mean confidence interval for cycles %-change: -10.32% -6.58%
    Cycles are helped.
    
    Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> [v1]
    Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    Fixes: be1cc35 ("nir: Add nir_const_value_negative_equal")
    (cherry picked from commit 0ac5ff9)
    ianromanick authored and jasuarez committed Jul 9, 2019
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  11. mesa: Set minimum possible GLSL version

    Set the absolute minimum possible GLSL version.  API_OPENGL_CORE can
    mean an OpenGL 3.0 forward-compatible context, so that implies a minimum
    possible version of 1.30.  Otherwise, the minimum possible version 1.20.
    Since Mesa unconditionally advertises GL_ARB_shading_language_100 and
    GL_ARB_shader_objects, every driver has GLSL 1.20... even if they don't
    advertise any extensions to enable any shader stages (e.g.,
    GL_ARB_vertex_shader).
    
    Converts about 2,500 piglit tests from crash to skip on NV18.
    
    Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
    Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109524
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110955
    Cc: mesa-stable@lists.freedesktop.org
    (cherry picked from commit 0349bc3)
    ianromanick authored and jasuarez committed Jul 9, 2019
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  12. vulkan/overlay: fix crash on freeing NULL command buffer

    It is legal to call vkFreeCommandBuffers() on NULL command buffers.
    
    This fix requires eb41ce1 ("util/hash_table: Properly handle
    the NULL key in hash_table_u64").
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: 4438188 ("vulkan/overlay: record stats in command buffers and accumulate on exec/submit")
    Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
    (cherry picked from commit a72351c)
    llandwerlin-intel authored and jasuarez committed Jul 9, 2019
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Commits on Jul 10, 2019

  1. radeonsi: don't set READ_ONLY for const_uploader to fix bindless text…

    …ure hangs
    
    Bindless textures can update descriptors with WRITE_DATA.
    
    Cc: 19.1 <mesa-stable@lists.freedesktop.org>
    Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
    Acked-by: Dave Airlie airlied@redhat.com
    (cherry picked from commit 5058d62)
    Marek Olšák authored and jasuarez committed Jul 10, 2019
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Commits on Jul 15, 2019

  1. nir: Add a helper to determine if an intrinsic can be reordered

    This is simple now, but we're going to be adding a few more conditions
    to this later.
    
    Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
    (cherry picked from commit a1c7379)
    cwabbott0 authored and jasuarez committed Jul 15, 2019
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  2. nir/instr_set: Expose nir_instrs_equal()

    Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
    (cherry picked from commit 6e984bc)
    gfxstrand authored and jasuarez committed Jul 15, 2019
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  3. nir/loop_analyze: Fix phi-of-identical-alu detection

    One issue was that the original version didn't check that swizzles
    matched when comparing ALU instructions so it could end up matching
    very different instructions.  Using the nir_instrs_equal function from
    nir_instr_set.c which we use for CSE should be much more reliable.
    Another was that the loop assumes it will only run two iterations which
    may not be true.  If there's something which guarantees that this case
    only happens for phis after ifs, it wasn't documented.
    
    Fixes: 9e6b39e "nir: detect more induction variables"
    Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
    (cherry picked from commit 9f7ffe4)
    gfxstrand authored and jasuarez committed Jul 15, 2019
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  4. nir: Add more helpers for working with const values

    Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
    (cherry picked from commit ce5581e)
    gfxstrand authored and jasuarez committed Jul 15, 2019
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  5. nir/loop_analyze: Handle bit sizes correctly in calculate_iterations

    The current code assumes everything is 32-bit which is very likely true
    but not guaranteed by any means.  Instead, use nir_eval_const_opcode to
    do the calculations in a bit-size-agnostic way.  We also use the new
    constant constructors to build the correct size constants.
    
    Fixes: 6772a17 "nir: Add a loop analysis pass"
    Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
    (cherry picked from commit 268ad47)
    gfxstrand authored and jasuarez committed Jul 15, 2019
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  6. nir/loop_analyze: Bail if we encounter swizzles

    None of the current code knows what to do with swizzles.  Take the safe
    option for now and bail if we see one.  This does have a small shader-db
    impact but it is at least safe.
    
    Shader-db results on Kaby Lake:
    
        total loops in shared programs: 4364 -> 4388 (0.55%)
        loops in affected programs: 5 -> 29 (480.00%)
        helped: 5
        HURT: 29
    
    Shader-db results on Haswell:
    
        total loops in shared programs: 4373 -> 4370 (-0.07%)
        loops in affected programs: 5 -> 2 (-60.00%)
        helped: 5
        HURT: 2
    
    Fixes: 6772a17 "nir: Add a loop analysis pass"
    Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
    (cherry picked from commit 9a3cb6f)
    gfxstrand authored and jasuarez committed Jul 15, 2019
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  7. anv: Set Stateless Data Port Access MOCS

    This is the MOCS setting used for the A64 stateless messages which we
    sometimes use for SSBO operations.
    
    Fixes: 48ed2a7 "anv: Implement VK_EXT_buffer_device_address"
    Fixes: 79fb0d2 "anv: Implement SSBOs bindings with GPU addr..."
    Reviewed-by: Chad Versace <chadversary@chromium.org>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    (cherry picked from commit 6a2ff21)
    gfxstrand authored and jasuarez committed Jul 15, 2019
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  8. mesa: save/restore SSO flag when using ARB_get_program_binary

    Without this the restored program will fail the pipeline validation
    checks when we attempt to use an SSO program.
    
    Fixes: c20fd74 ("mesa: Add Mesa ARB_get_program_binary helper functions")
    
    Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111010
    (cherry picked from commit 3043908)
    tarceri authored and jasuarez committed Jul 15, 2019
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  9. anv: Fix pool allocator when first alloc needs to grow

    When using softpin, the first allocation was not calculating the
    padding and offset correctly for the case the first allocation needed
    to grow.  We were missing initialize the state.end right after
    expanding the pool for the first time.
    
    This is not a problem for non-softpin since there we don't use
    leftover padding so the ends would re-arrange incrementally.
    
    This fixes running dEQP-VK.ssbo.phys.layout.random.16bit.scalar.13 in
    SKL -- the test uses a shader larger than the initial size for the
    instruction pool.
    
    Fixes: dfc9ab2 "anv/allocator: Add padding information."
    Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
    Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
    (cherry picked from commit 09c4037)
    cmarcelo authored and jasuarez committed Jul 15, 2019
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  10. freedreno: Fix assertion failures in context setup in shader-db mode.

    Cherry-picks a0d4d7f upstream
    
    The TTN path needs access to the screen to make the right decisions about
    lowering, but we didn't have pctx->screen set up at fdN_prog_init time.
    
    Reviewed-by: Rob Clark <robdclark@gmail.com>
    Tested-by: Eduardo Lima Mitev <elima@igalia.com>
    Signed-off-by: John Stultz <john.stultz@linaro.org>
    anholt authored and jasuarez committed Jul 15, 2019
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  11. meson: Add dep_thread dependency.

    Fix this build error on Ubuntu 18.04.
    
    /usr/bin/ld: src/util/libmesa_util.a(u_cpu_detect.c.o): undefined reference to symbol 'pthread_once@@GLIBC_2.2.5'
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110663
    Suggested-by: Eric Engestrom <eric@@engestrom.ch>
    Signed-off-by: Vinson Lee <vlee@freedesktop.org>
    Reviewed-by: Eric Anholt <eric@anholt.net>
    Acked-by: Eric Engestrom <eric@engestrom.ch>
    (cherry picked from commit 730ceed)
    vinsonlee authored and jasuarez committed Jul 15, 2019
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Commits on Jul 16, 2019

  1. anv: fix crash in vkCmdClearAttachments with unused attachment

    anv_render_pass_compile() turns an unused attachment into a NULL
    depth_stencil_attachment pointer so check that pointer before
    accessing it.
    
    Found with updates to existing CTS tests.
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: 208be8e ("anv: Make subpass::depth_stencil_attachment a pointer")
    Reviewed-by: Eric Engestrom <eric@engestrom.ch>
    Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
    (cherry picked from commit c9c8c2f)
    llandwerlin-intel authored and jasuarez committed Jul 16, 2019
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  2. anv: Add android dependencies on android.

    Specifically needed for nativewindow for some VK_EXT_external_memory_android_hardware_buffers
    functions, where we call into some AHardwareBuffer functions.
    
    The legacy Android ext did not have us call into any Android function
    at all and hence it was not noticed.
    
    Fixes: 755c633 "anv: Fix vulkan build in meson."
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    Reviewed-by: Chad Versace <chadversary@chromium.org>
    (cherry picked from commit d4f0f1a)
    BNieuwenhuizen authored and jasuarez committed Jul 16, 2019
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  3. nir/opt_if: Clean up single-src phis in opt_if_loop_terminator

    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111071
    Fixes: 2a74296 "nir: add opt_if_loop_terminator()"
    Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
    (cherry picked from commit 7a19e05)
    gfxstrand authored and jasuarez committed Jul 16, 2019
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  4. nir,intel: Add support for lowering 64-bit nir_opt_extract_*

    We need this when doing full software 64-bit emulation.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110309
    Fixes: cbad201 "nir/algebraic: Add missing 64-bit extract_[iu]8..."
    Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
    Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
    (cherry picked from commit 0ba508d)
    gfxstrand authored and jasuarez committed Jul 16, 2019
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  5. spirv: Fix stride calculation when lowering Workgroup to offsets

    Use alignment to calculate the stride associated with the pointer
    types.  That stride is used when the pointers are casted to arrays.
    
    Note that size alone is not sufficient, e.g. struct { vec2 a; vec1 b;
    } will have element an element size of 12 bytes, but the stride needs
    to be 16 bytes to respect the 8 byte alignment.
    
    Fixes: 050eb63 "spirv: Ignore ArrayStride in OpPtrAccessChain for Workgroup"
    Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
    (cherry picked from commit 026cfa1)
    cmarcelo authored and jasuarez committed Jul 16, 2019
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Commits on Jul 17, 2019

  1. meta: memory leak of CopyPixels usage

    Meta of CopyPixel generates a buffer object
    but does not free it on cleanup.
    
    Fixes: 37d11b1 (meta: Don't pollute the buffer object namespace in _mesa_meta_setup_vertex_objects)
    Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
    Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
    (cherry picked from commit 7417b43)
    Sergii Romantsov authored and jasuarez committed Jul 17, 2019
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  2. anv: Account for dynamic stencil write disables in the PMA fix

    In 6ce8592 we started looking at the dynamic stencil state and
    disabling stencil writes when the stencil mask is zero.  Unfortunately,
    we never updated the PMA fix code accordingly so 3DSTATE_WM_DEPTH_STENCIL
    and the PMA fix were getting out-of-sync causing hangs.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109203
    Fixes: 6ce8592 "anv: Disable stencil writes when both write..."
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    (cherry picked from commit 6a44115)
    gfxstrand authored and jasuarez committed Jul 17, 2019
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  3. meta: leaking of BO with DrawPixels

    ctx->Unpack.BufferObj wasn't unreferenced.
    
    Fixes: d492e7b (meta: Fix invalid PBO access from DrawPixels when
    trying to just alloc.)
    CC: Eric Anholt <eric@anholt.net>
    Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
    Reviewed-by: Eric Anholt <eric@anholt.net>
    (cherry picked from commit 3853871)
    sigexp authored and jasuarez committed Jul 17, 2019
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  4. nir/regs_to_ssa: Handle regs in phi sources properly

    Sources of phi instructions act as if they occur at the very end of the
    predecessor block not the block in which the phi lives.  In order to
    handle them correctly, we have to skip phi sources on the normal
    instruction walk and handle them as a separate walk over the successor
    phis.  While registers in phi instructions is a bit of an oddity it can
    happen when we temporarily go out-of-SSA for control-flow manipulations.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111075
    Cc: mesa-stable@lists.freedesktop.org
    Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
    (cherry picked from commit 6fb685f)
    gfxstrand authored and jasuarez committed Jul 17, 2019
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  5. softpipe: Remove unused static function

    Thanks to Eric Engestrom for pointing out that there was something wrong
    with that function.
    
    Fixes: 724a735
      softpipe: Prepare handling explicit gradients
    
    Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
    Reviewed-by: Eric Anholt <eric@anholt.net>
    (cherry picked from commit 9c611fb)
    gerddie authored and jasuarez committed Jul 17, 2019
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Commits on Jul 18, 2019

  1. nir/loop_analyze: Refactor detection of limit vars

    This commit reworks both get_induction_and_limit_vars() and
    try_find_trip_count_vars_in_iand to return true on success and not
    modify their output parameters on failure.  This makes their callers
    significantly simpler.
    
    Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
    (cherry picked from commit 0333649)
    gfxstrand authored and jasuarez committed Jul 18, 2019
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  2. nir: Add some helpers for chasing SSA values properly

    There are various cases in which we want to chase SSA values through ALU
    ops ranging from hand-written optimizations to back-end translation
    code.  In all these cases, it can be very tricky to do properly because
    of swizzles.  This set of helpers lets you easily work with a single
    component of an SSA def and chase through ALU ops safely.
    
    Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
    (cherry picked from commit 8f7405e)
    [Juan A. Suarez: resolve trivial conflicts]
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    
    Conflicts:
    	src/compiler/nir/nir.h
    gfxstrand authored and jasuarez committed Jul 18, 2019
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  3. nir/loop_analyze: Properly handle swizzles in loop conditions

    This commit re-plumbs all of nir_loop_analyze to use nir_ssa_scalar for
    all intermediate values so that we can properly handle swizzles.  Even
    though if conditions are required to be scalars, they may still consume
    swizzles so you could have ((a.yzw < b.zzx).xz && c.xx).y == 0 as your
    loop termination condition.  The old code would just bail the moment it
    saw its first non-zero swizzle but we can now properly chase the scalar
    from the if condition to all the way to a, b, and c.
    
    Shader-db results on Kaby Lake:
    
        total loops in shared programs: 4388 -> 4364 (-0.55%)
        loops in affected programs: 29 -> 5 (-82.76%)
        helped: 29
        HURT: 5
    
    Shader-db results on Haswell:
    
        total loops in shared programs: 4370 -> 4373 (0.07%)
        loops in affected programs: 2 -> 5 (150.00%)
        helped: 2
        HURT: 5
    
    Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
    (cherry picked from commit ff972c7)
    gfxstrand authored and jasuarez committed Jul 18, 2019
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  4. vulkan/wsi: update swapchain status on vkQueuePresent

    With the following chain of events :
    
       vkQueuePresent()
       <- Surface resize
       vkQueuePresent()
    
    We should be able to report SUBOPTIMAL or OUT_OF_DATE on the second
    vkQueuePresent() call. Currently we only look at X11 events in the
    vkAcquireNextImage() path so we're not able to report this.
    
    This change checks the queue of events and process any available ones
    to update the swapchain status.
    
    v2: Be consistent about reporting the current error state of the
        swapchain (Jason)
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111097
    Cc: <mesa-stable@lists.freedesktop.org>
    Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
    (cherry picked from commit 6f880f1)
    llandwerlin-intel authored and jasuarez committed Jul 18, 2019
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  5. anv: report timestampComputeAndGraphics true

    Spec says :
    
       "timestampComputeAndGraphics specifies support for timestamps on all
        graphics and compute queues. If this limit is set to VK_TRUE, all
        queues that advertise the VK_QUEUE_GRAPHICS_BIT or
        VK_QUEUE_COMPUTE_BIT in the VkQueueFamilyProperties::queueFlags
        support VkQueueFamilyProperties::timestampValidBits of at least 36."
    
    On gen7+ this should be true (we only have 32bits of timestamp on
    gen6 and below).
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: 802f002 ("anv/device: Update features and limits")
    Reported-by: Timothy Strelchun <timothy.strelchun@intel.com>
    Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
    (cherry picked from commit ce4c547)
    llandwerlin-intel authored and jasuarez committed Jul 18, 2019
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  6. radv: Only save the descriptor set if we have one.

    After reset, if valid does not contain the relevant bit the descriptor
    can be != NULL but still not be valid.
    
    CC: <mesa-stable@lists.freedesktop.org>
    Reviewed-by: Dave Airlie <airlied@redhat.com>
    (cherry picked from commit f1a8967)
    BNieuwenhuizen authored and jasuarez committed Jul 18, 2019
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  7. virgl: Set meta data for textures from handle.

    The set of meta data was removed by commit 8083464. It broke lots of
    dEQP tests when running with pbuffer surface type.
    
    Fixes: 8083464 ("virgl: remove dead code")
    Signed-off-by: Lepton Wu <lepton@chromium.org>
    Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
    Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
    (cherry picked from commit 6109df5)
    Lepton Wu authored and jasuarez committed Jul 18, 2019
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  8. anv: fix format mapping for depth/stencil formats

    anv_format is supposed to have a pointer back to the associated
    VkFormat, we were missed this for depth/stencil formats.
    
    This doesn't fix anything afaict, but will be needed for future
    changes.
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: 465de47 ("anv: associate vulkan formats with aspects")
    Acked-by: Jason Ekstrand <jason@jlekstrand.net>
    (cherry picked from commit 3adc32d)
    llandwerlin-intel authored and jasuarez committed Jul 18, 2019
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  9. anv: fix alphaToCoverage when there is no color attachment

    There are tests in CTS for alpha to coverage without a color attachment
    that are failing. This happens because we remove the shader color
    outputs when we don't have a valid color attachment for them, but when
    alpha to coverage is enabled we still want to preserve the the output
    at location 0 since we need the alpha component. In that case we will
    also need to create a null render target for RT 0.
    
    v2:
      - We already create a null rt when we don't have any, so reuse that
        for this case (Jason)
      - Simplify the code a bit (Iago)
    
    v3:
      - Take alpha to coverage from the key and don't tie this to depth-only
        rendering only, we want the same behavior if we have multiple render
        targets but the one at location 0 is not used. (Jason).
      - Rewrite commit message (Iago)
    
    v4:
      - Make sure we take into account the array length of the shader outputs,
        which we were no handling correctly either and make sure we also
        create null render targets for any invalid array entries too.
    
    v5:
      - Simplify removal of unused outputs by using rt_used[] so we don't have
        to special case alpha to coverage there too.
    
    Fixes the following CTS tests:
    dEQP-VK.pipeline.multisample.alpha_to_coverage_no_color_attachment.*
    
    Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
    Signed-off-by: Iago Toral Quiroga <itoral@igalia.com>
    Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
    (cherry picked from commit bc66ceb)
    samuelig authored and jasuarez committed Jul 18, 2019
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Commits on Jul 19, 2019

  1. radv: fix VGT_GS_MODE if VS uses the primitive ID

    Found by inspection.
    
    Cc: <mesa-stable@lists.freedesktop.org>
    Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
    (cherry picked from commit 63d670e)
    [Juan A. Suarez: resolve trivial conflicts]
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    
    Conflicts:
    	src/amd/vulkan/radv_pipeline.c
    hakzsam authored and jasuarez committed Jul 19, 2019
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  2. radv: fix crash in shader tracing.

    Enabling tracing, and then having a vmfault, can leads to a segfault
    before we print out the traces, as if a meta shader is executing
    and we don't have the NIR for it.
    
    Just pass the stage and give back a default.
    
    Fixes: 9b9ccee ("radv: take LDS into account for compute shader occupancy stats")
    Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    (cherry picked from commit 2ac2b98)
    airlied authored and jasuarez committed Jul 19, 2019
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Commits on Jul 23, 2019

  1. Update version to 19.1.3

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Jul 23, 2019
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  2. docs: add release notes for 19.1.3

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Jul 23, 2019
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  3. docs: add sha256 checksums for 19.1.3

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Jul 23, 2019
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  4. radv: fix crash in vkCmdClearAttachments with unused attachment

    depth_stencil_attachment and/or ds_resolve attachment can be NULL.
    
    This fixes crashes with
    dEQP-VK.renderpass.suballocation.unused_clear_attachments.*
    
    Cc: 19.1 <mesa-stable@lists.freedesktop.org>
    Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
    (cherry picked from commit b5116d3)
    [Juan A. Suarez: resolve trivial conflicts]
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    
    Conflicts:
    	src/amd/vulkan/radv_meta_clear.c
    hakzsam authored and jasuarez committed Jul 23, 2019
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  5. egl/android: Update color_buffers querying for buffer age

    color_buffers[] is currently hard coded to 3 for android which fails
    in droid_window_dequeue_buffer when ANativeWindow creates color_buffers
    >3 while querying buffer age during dEQP partial_update tests on chromeOS.
    
    The patch removes static color_buffers[], queries for MIN_UNDEQUEUED_BUFFERS,
    sets native window buffer count and allocates the correct number of
    color_buffers as per android.
    
    Fixes dEQP-EGL.functional.partial_update* tests on chromebooks with
    enabling EGL_KHR_partial_update.
    
    v2: update comment instead of removing (Eric Engestrom)
    v3: change static array to dynamic allocated color_buffers
        querying MIN_UNDEQUEUED_BUFFERS (Chia-I Wu olv@chromium.org)
    
    Fixes: 2acc69d "EGL/Android: Add EGL_EXT_buffer_age extension"
    Signed-off-by: Nataraj Deshpande <nataraj.deshpande@intel.com>
    Acked-by: Eric Engestrom <eric@engestrom.ch>
    Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
    (cherry picked from commit 0661c35)
    nvdeshpande authored and jasuarez committed Jul 23, 2019
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  6. intel/fs: Stop stack allocating large arrays

    Normally, we haven't worried too much about stack sizes as Linux tends
    to be fairly friendly towards large stacks.  However, when running DXVK
    apps under wine, we're suddenly subject to Windows' more stringent stack
    limitations and can run out of space more easily.  In particular, some
    of the shaders in Elite Dangerous: Horizons have quite a few registers
    and the arrays in split_virtual_grfs are large enough to blow a 1 MiB
    stack leading to crashes during shader compilation.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108662
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Reviewed-by: Eric Anholt <eric@anholt.net>
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    Cc: mesa-stable@lists.freedesktop.org
    (cherry picked from commit fa63fad)
    gfxstrand authored and jasuarez committed Jul 23, 2019
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  7. mesa: Fix ReadBuffers with pbuffers

    pbuffers are internally single-buffered.  Marek fixed DrawBuffers to
    handle this case, but we need to fix ReadBuffers too.  Otherwise,
    pretty much every conformance test fails because glReadPixels breaks.
    
    v2: Refactor the switch into a helper (suggested by Eric Anholt)
    
    Fixes: 35294f2 ("mesa: fix pbuffers because internally they are front buffers")
    Acked-by: Eric Engestrom <eric.engestrom@intel.com> (v1)
    Reviewed-by: Eric Anholt <eric@anholt.net>
    (cherry picked from commit 78164a3)
    kaydenl authored and jasuarez committed Jul 23, 2019
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  8. egl: Quiet warning about front buffer rendering for pixmaps/pbuffers

    pbuffer configs cause a million of these warnings to trigger, but
    when using pixmaps or buffers, there is only one surface, so this
    warning doesn't make much sense.  Retain it for window surfaces for now.
    
    Fixes: dacb11a ("egl: Add a 565 pbuffer-only EGL config under X11.")
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    Reviewed-by: Eric Anholt <eric@anholt.net>
    (cherry picked from commit fc21394)
    kaydenl authored and jasuarez committed Jul 23, 2019
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  9. egl: Make the 565 pbuffer-only config single buffered.

    In commit dacb11a, Eric found the first
    matching 565 pbuffer config, and stopped.  Our double-buffered configs
    come first in the list, so we added that, making a pbuffer-only config
    that claimed to be double buffered.  This doesn't make sense, since
    pixmaps/pbuffers are fundamentally not double buffered.
    
    When using that config, every call to eglCreatePbufferSurface would fail
    with EGL_BAD_MATCH.  The call chain looks like this:
    
       - eglCreatePbufferSurface
       - dri3_create_pbuffer_surface
       - dri3_create_surface
       - dri2_get_dri_config
    
    which eventually does:
    
       const bool double_buffer = surface_type == EGL_WINDOW_BIT;
    
    and then fails to find a matching config, because it ends up looking
    for a single-buffered config - and there aren't any.
    
    To fix this, make the 565 pbuffer config single-buffered.  This fixes
    at least 51 dEQP-EGL.* tests.
    
    Fixes: dacb11a ("egl: Add a 565 pbuffer-only EGL config under X11.")
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    Reviewed-by: Eric Anholt <eric@anholt.net>
    (cherry picked from commit 6ad31c4)
    kaydenl authored and jasuarez committed Jul 23, 2019
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  10. egl: Only expose 565 pbuffer configs if X can export them as DRI3 images

    Glamor in xorg-server 1.20 cannot expose 16bpp pixmaps when running in
    the usual 24bpp mode.  This meant our 565 pbuffer configs would
    ultimately fail to create a backing pixmap, leading to crashes.
    
    To hack around this, make a 16bpp pixmap and try and export it.
    If it works, expose the configs.  Otherwise, just skip them.
    
    This also disables them on DRI2.  These configs were only added to pass
    conformance requirements, and I doubt anybody cares about testing out
    565 pbuffer visuals on DRI2-only drivers.
    
    v2: Don't leak the fds (caught by Eric Anholt)
    v3: Don't free(fds), it's not malloc'd
    
    Fixes: dacb11a ("egl: Add a 565 pbuffer-only EGL config under X11.")
    Reviewed-by: Eric Anholt <eric@anholt.net>
    (cherry picked from commit 82607f8)
    kaydenl authored and jasuarez committed Jul 23, 2019
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  11. st/nir: fix arb fragment stage conversion

    The comment even justifies the wrongness wrongly.
    
    We should be translating to pipe values properly here or else
    fragment maps to tess ctrl.
    
    Fixes: 3d7611e ("st/nir: use NIR for asm programs")
    Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    (cherry picked from commit 365f247)
    airlied authored and jasuarez committed Jul 23, 2019
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Commits on Jul 24, 2019

  1. nir: don't return void

    Fixes: 14531d6 ("nir: make nir_const_value scalar")
    Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
    Reviewed-by: Karol Herbst <kherbst@redhat.com>
    (cherry picked from commit 3acc427)
    1ace authored and jasuarez committed Jul 24, 2019
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  2. anv: fix use of comma operator

    This doesn't fix any bug at the moment because the next statement is
    'true' which happens to be APIMODE_D3D, but if that changes it could.
    
    The fixes tags is as far I could go but the error predates it (2016 is
    probably far enough).
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: 8db6f2e ("anv/pipeline: Roll genX_pipeline_util.h into genX_pipeline.c")
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
    (cherry picked from commit 772a5f9)
    [Juan A. Suarez: resolve trivial conflicts]
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    
    Conflicts:
    	src/intel/vulkan/genX_pipeline.c
    llandwerlin-intel authored and jasuarez committed Jul 24, 2019
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  3. meson: allow building all glx without any drivers

    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111016
    Fixes: a47c525
           ("meson: build glx")
    Acked-by: Emil Velikov <emil.velikov@collabora.com>
    Reviewed-by: Eric Anholt <eric@anholt.net>
    (cherry picked from commit 7cf50af)
    dcbaker authored and jasuarez committed Jul 24, 2019
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  4. util: fix no-op macro (bad number of arguments)

    Fixes: b8e077d ("util: no-op __builtin_types_compatible_p() for non-GCC compilers")
    Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    (cherry picked from commit f986741)
    1ace authored and jasuarez committed Jul 24, 2019
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  5. gallium+mesa: fix tgsi_semantic array type

    Fixes: ed23335 ("gallium: use enums in p_shader_tokens.h (v2)")
    Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    (cherry picked from commit e7e31b1)
    1ace authored and jasuarez committed Jul 24, 2019
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Commits on Jul 25, 2019

  1. intel/compiler: don't use a keyword struct for a class fs_reg

    warning: struct 'fs_reg' was previously declared as a class
    Fixes: e64be39 ("intel/compiler: generalize the combine constants pass")
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
    (cherry picked from commit fa2fc68)
    asimiklit authored and jasuarez committed Jul 25, 2019
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  2. main: Fix memleaks in mesa_use_program

    Add freeing of SubroutineIndexes to the _mesa_free_shader_state.
    
    Fixes: 4566aaa ("mesa/subroutines: start adding per-context
    subroutine index support (v1.1)")
    Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    (cherry picked from commit 882fe09)
    sigexp authored and jasuarez committed Jul 25, 2019
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  3. egl: Also query modifiers when exporting DMABuf

    This fixes eglExportDMABUFImageQueryMESA() so it will report the
    modififers of the underlying image. Without this information,
    re-importing will likely be broken as it is rare these days that no
    modifiers are used.
    
    Reviewed-by: Eric Engestrom <eric@engestrom.ch>
    Reviewed-by: Daniel Stone <daniels@collabora.com>
    Fixes: 8f7338f ("egl: add initial EGL_MESA_image_dma_buf_export v2.4")
    (cherry picked from commit 08f1cef)
    ndufresne authored and jasuarez committed Jul 25, 2019
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  4. spirv: Fix order of barriers in SpvOpControlBarrier

    Semantically, the memory barrier has to come first to wait
    for the completion of pending memory requests.
    Afterwards, the workgroups can be synchronized.
    
    Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
    (cherry picked from commit e352b4d)
    daniel-schuermann authored and jasuarez committed Jul 25, 2019
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Commits on Jul 26, 2019

  1. anv: report HOST_ALLOCATION as supported for images

    Report VK_EXTERNAL_MEMORY_HANDLE_TYPE_HOST_ALLOCATION_BIT_EXT as
    supported for images. It was being shown supported for buffers, but not
    images.
    
    Fixes: 69cc627 ("anv: Implement VK_EXT_external_memory_host")
    
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    (cherry picked from commit 832cedf)
    Arcady Goldmints-Orlov authored and jasuarez committed Jul 26, 2019
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  2. radv: Set correct metadata size for GFX9+.

    Without correct size, radeonsi assumes the metadata is incorrect,
    which can and will cause issues.
    
    Since the metadata is really incorrect without the size, let us
    fix that.
    
    Fixes: e43cc3e "radv/gfx9: handle GFX9 opaque metadata"
    Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    (cherry picked from commit 7e1fe81)
    BNieuwenhuizen authored and jasuarez committed Jul 26, 2019
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  3. anv: Disable transform feedback on gen7

    It's totally implementable, it's just that the plumbing is a bit
    different and we never hooked it up.  Don't advertise a broken feature.
    
    Fixes: 36ee2fd "anv: Implement the basic form of VK_EXT_transform_feedback"
    (cherry picked from commit 295e5a1)
    [Juan A. Suarez: resolve trivial conflicts]
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    
    Conflicts:
    	src/intel/vulkan/anv_extensions.py
    gfxstrand authored and jasuarez committed Jul 26, 2019
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  4. nvc0/ir: Fix assert accessing null pointer

    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111007
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111167
    
    Signed-off-by: Mark Menzynski <mmenzyns@redhat.com>
    Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
    Reviewed-by: Tobias Klausmann<tobias.klausmann@freenet.de>
    (cherry picked from commit 7493fbf)
    Mark Menzynski authored and jasuarez committed Jul 26, 2019
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Commits on Jul 29, 2019

  1. nir: add access to image_deref intrinsics

    SPIRV added the ability to access variables and have expressions non
    dynamically uniform and because spirv_to_nir generates deref
    instructions, we'll need to have that access there.
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Cc: <mesa-stable@lists.freedesktop.org>
    Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
    Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
    (cherry picked from commit 8c33072)
    [Juan A. Suarez: resolve trivial conflicts]
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    
    Conflicts:
    	src/compiler/nir/nir.c
    llandwerlin-intel authored and jasuarez committed Jul 29, 2019
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  2. radeon/uvd: fix poc for hevc encode

    MaxPicOrderCntLsb should be at least 16 according to the spec,
    therefore add minimum value check.
    
    Also use poc value passed from st instead of calculation
    in slice header encoding.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110673
    Cc: mesa-stable@lists.freedesktop.org
    
    V2: Fix typo
    
    V3: Use MAX2 macro instead of coding. Also MaxPicOrderCntLsb
    should be power of 2 according to spec.
    
    Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
    Acked-by: Leo Liu <leo.liu@amd.com>
    (cherry picked from commit 77cf700)
    Boyz-Radeon authored and jasuarez committed Jul 29, 2019
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  3. radeon/vcn: fix poc for hevc encode

    MaxPicOrderCntLsb should be at least 16 according to the spec,
    therefore add minimum value check.
    
    Also use poc value passed from st instead of calculation
    in slice header encoding.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110673
    Cc: mesa-stable@lists.freedesktop.org
    
    V2: Fix typo
    
    V3: Use MAX2 macro instead of coding. Also MaxPicOrderCntLsb
    should be power of 2 according to spec.
    
    Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
    Acked-by: Leo Liu <leo.liu@amd.com>
    (cherry picked from commit 9aaf3aa)
    Boyz-Radeon authored and jasuarez committed Jul 29, 2019
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  4. radeon/uvd: enable rate control for hevc encoding

    Set cu_qp_delta_enable_flag on when rate control is enabled, and set it
    off when rate control is disabled (e.g. constant qp).
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110673
    Cc: mesa-stable@lists.freedesktop.org
    
    V2: fix typo and add bugzilla info
    
    Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
    Acked-by: Leo Liu <leo.liu@amd.com>
    (cherry picked from commit 5115c25)
    Boyz-Radeon authored and jasuarez committed Jul 29, 2019
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  5. radeon/vcn: enable rate control for hevc encoding

    Set cu_qp_delta_enable_flag on when rate control is enabled, and set it
    off when rate control is disabled (e.g. constant qp).
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110673
    Cc: mesa-stable@lists.freedesktop.org
    
    V2: fix typo and add bugzilla info
    
    Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
    Acked-by: Leo Liu <leo.liu@amd.com>
    (cherry picked from commit b0626c1)
    Boyz-Radeon authored and jasuarez committed Jul 29, 2019
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  6. gallium/vl: fix compute tgsi shaders to not process undefined components

    This caused nouveau's function handling logic to think that the MAIN
    function was due to receive external parameters, and cascaded some
    failures after that. Instead avoid having the undefined components in
    the first place.
    
    Fixes: f6ac0b5 (gallium/auxiliary/vl: Add compute shader to support video compositor render)
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111213
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111217
    Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    (cherry picked from commit face27f)
    imirkin authored and jasuarez committed Jul 29, 2019
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  7. nv50,nvc0: update sampler/view bind functions to accept NULL array

    Apparently vl (or vdpau) wants to pass that in now. Handle it.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111213
    Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
    Reviewed-by: Karol Herbst <kherbst@redhat.com>
    Cc: mesa-stable@lists.freedesktop.org
    (cherry picked from commit c52b057)
    imirkin authored and jasuarez committed Jul 29, 2019
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  8. nvc0: allow a non-user buffer to be bound at position 0

    Previously the code only handled it for positions 1 and up (as would be
    for UBO's in GL). It's not a lot of trouble to handle this, and vl or
    vdpau want this.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111213
    Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
    Reviewed-by: Karol Herbst <kherbst@redhat.com>
    Cc: mesa-stable@lists.freedesktop.org
    (cherry picked from commit 9f8ed5a)
    imirkin authored and jasuarez committed Jul 29, 2019
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  9. nv50/ir: handle insn not being there for definition of CVT arg

    This can happen if it's e.g. a uniform or a function argument.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111217
    Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
    Reviewed-by: Karol Herbst <kherbst@redhat.com>
    Cc: mesa-stable@lists.freedesktop.org
    (cherry picked from commit 3e468ff)
    imirkin authored and jasuarez committed Jul 29, 2019
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Commits on Jul 30, 2019

  1. anv: Remove special allocation for anv_push_constants

    The key reason for that mechanism is gone: all the extra optional data
    that could be in the anv_push_constants was moved elsewhere.  At this
    point, just put anv_push_constants directly in anv_cmd_state (part of
    anv_cmd_buffer).
    
    v2: Remove a NULL check we don't need anymore in
        anv_cmd_buffer_push_constants().  (Lionel)
        Fix size we consider for valid push params.  (Lionel)
    
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    (cherry picked from commit f7d53ff)
    cmarcelo authored and jasuarez committed Jul 30, 2019
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  2. nir: Allow qualifiers on copy_deref and image instructions

    In the next commit, we'll properly handle access qualifiers on struct
    members by propagating them to load/store instructions, but these
    instructions had no way to specify the qualifier.
    
    Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
    (cherry picked from commit 6f20643)
    cwabbott0 authored and jasuarez committed Jul 30, 2019
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  3. spirv: wrap push ssa/pointer values

    This refactor allows for common code to apply decoration on all
    ssa/pointer values. In particular this will allow to propagage access
    qualifiers.
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Suggested-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
    Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
    (cherry picked from commit 86b5377)
    [Lionel Landwerlin: patch adapted for 19.1 branch]
    llandwerlin-intel authored and jasuarez committed Jul 30, 2019
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  4. spirv: propagate access qualifiers through ssa & pointer

    Not only variables can be flagged as NonUniformEXT but also
    expressions. We're currently ignoring it in an expression such as :
    
       imageLoad(data[nonuniformEXT(rIndex)], 0)
    
    The associated SPIRV :
    
       OpDecorate %69 NonUniformEXT
       ...
       %69 = OpLoad %61 %68
    
    This changes propagates access qualifiers through ssa & pointers so
    that when it hits a OpLoad/OpStore style instructions, qualifiers are
    not forgotten.
    
    Fixes failure the following tests :
    
       dEQP-VK.descriptor_indexing.*
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: 8ed583f ("spirv: Handle the NonUniformEXT decoration")
    Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
    (cherry picked from commit 0fb61df)
    llandwerlin-intel authored and jasuarez committed Jul 30, 2019
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  5. ac/nir: fix txf_ms with an offset

    Seems to fix some hair artifacts in Max Payne 3:
    daniel-schuermann/mesa#76
    
    Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
    Fixes: f4e499e ('radv: add initial non-conformant radv vulkan driver')
    Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
    Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    (cherry picked from commit a9f58af)
    pendingchaos authored and jasuarez committed Jul 30, 2019
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  6. isl/formats: R8G8B8_UNORM_SRGB isn't supported on HSW

    On Haswell, the format works but it doesn't properly do an sRGB decode.
    It appears to act identically to R8G8B8_UNORM.  Only Vulkan uses this
    format so this only affects Vulkan on HSW.
    
    Cc: mesa-stable@lists.freedesktop.org
    Reviewed-by: Eric Engestrom <eric@engestrom.ch>
    (cherry picked from commit 7c1b39c)
    gfxstrand authored and jasuarez committed Jul 30, 2019
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  7. anv: Don't claim support for 24 and 48-bit formats on IVB

    Cc: mesa-stable@lists.freedesktop.org
    (cherry picked from commit 99d04a5)
    gfxstrand authored and jasuarez committed Jul 30, 2019
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  8. radv: Take variable descriptor counts into account for buffer entries.

    Fixes: b5e04e9 "radv: Support allocating variable size descriptor sets."
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111019
    Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    (cherry picked from commit aac4929)
    BNieuwenhuizen authored and jasuarez committed Jul 30, 2019
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  9. freedreno: Fix data races with allocating/freeing struct ir3.

    There is a single ir3_compiler in the screen, and each context may be
    compiling ir3 shaders, which call ir3_create.  ralloc doesn't do any
    locking on its own, so eventually you can end up racing to break
    ralloc's linked lists.
    
    We really don't want struct ir3 to live as long as the compiler (maybe
    struct ir3_shader's lifetime, if anything), so you'd better be freeing
    it anyway.
    
    Fixes: 8fe2076 ("freedreno/ir3: convert over to ralloc")
    Reviewed-by: Rob Clark <robdclark@gmail.com>
    (cherry picked from commit 6e3b220)
    anholt authored and jasuarez committed Jul 30, 2019
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  10. meson: add a warning for meson < 0.46.0

    This could help somebody to be noticed about meson issue:
    mesonbuild/meson#3274
    as result NDEBUG won't be defined even if b_ndebug is true
    and buildtype is release.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109791
    Cc: mesa-stable@lists.freedesktop.org
    Acked-by: Eric Engestrom <eric.engestrom@intel.com>
    Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
    asimiklit committed Jul 30, 2019
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Commits on Jul 31, 2019

  1. radv: fix queries with WAIT_BIT returning VK_NOT_READY

    When vkGetQueryPoolResults() is called with VK_QUERY_RESULT_WAIT_BIT
    set, the driver is supposed to wait for the query to become available
    before returning.
    
    Currently, radv returns once the query is indeed ready, but it returns
    VK_NOT_READY. It also fails to populate the results.
    
    The problem is a missing volatile in the secondary check for query
    availability. This patch removes the secondary check altogether since it
    is redundant with the preceding loop.
    
    This bug was found with an unreleased version of SteamVR.
    
    Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
    (cherry picked from commit 2b71b4e)
    lostgoat authored and jasuarez committed Jul 31, 2019
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  2. spirv: don't discard access set by vtn_pointer_dereference

    We can have a access flag already set here so just augment the
    existing ones.
    
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Fixes: 0fb61df ("spirv: propagate access qualifiers through ssa & pointer")
    Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
    (cherry picked from commit 7deb5ec)
    llandwerlin-intel authored and jasuarez committed Jul 31, 2019
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  3. radv: Fix descriptor set allocation failure.

    Set all the handles to VK_NULL_HANDLE:
    
    "If the creation of any of those descriptor sets fails, then the implementation
    must destroy all successfully created descriptor set objects from this command,
    set all entries of the pDescriptorSets array to VK_NULL_HANDLE and return the
    error."
    
    (Vulkan 1.1.117 Spec, section 13.2)
    
    CC: <mesa-stable@lists.freedesktop.org>
    Reviewed-by: Dave Airlie <airlied@redhat.com>
    (cherry picked from commit 2b53c49)
    BNieuwenhuizen authored and jasuarez committed Jul 31, 2019
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  4. scons+meson: suppress spammy build warning on MacOS

    Originally introduced in c7f3657 ("darwin: Suppress type
    conversion warnings for GLhandleARB") to fix Bugzilla #66346 [1], this
    workaround was never ported to Scons or Meson.
    
    [1] https://bugs.freedesktop.org/66346
    
    Cc: mesa-stable@lists.freedesktop.org
    Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
    Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
    (cherry picked from commit bf8b5de)
    1ace authored and jasuarez committed Jul 31, 2019
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  5. intel/fs: Use ALIGN16 instructions for all derivatives on gen <= 7

    The issue here was discovered by a set of Vulkan CTS tests:
    
        dEQP-VK.glsl.derivate.*.dynamic_*
    
    These tests use ballot ops to construct a branch condition that takes
    the same path for each 2x2 quad but may not be uniform across the whole
    subgroup.  They then tests that derivatives work and give the correct
    value even when executed inside such a branch.  Because the derivative
    isn't executed in uniform control-flow and the values coming into the
    derivative aren't smooth (or worse, linear), they nicely catch bugs that
    aren't uncovered by simpler derivative tests.
    
    Unfortunately, these tests require Vulkan and the equivalent GL test
    would require the GL_ARB_shader_ballot extension which requires int64.
    Because the requirements for these tests are so high, it's not easy to
    test on older hardware and the bug is only proven to exist on gen7;
    gen4-6 are a conjecture.
    
    Cc: mesa-stable@lists.freedesktop.org
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    (cherry picked from commit 499d760)
    gfxstrand authored and jasuarez committed Jul 31, 2019
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  6. intel/fs: Implement quad_swap_horizontal with a swizzle on gen7

    This fixes dEQP-VK.subgroups.quad.compute.subgroupquadswaphorizontal_*
    on all gen7 platforms.
    
    Cc: mesa-stable@lists.freedesktop.org
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    (cherry picked from commit 8fd2f2c)
    gfxstrand authored and jasuarez committed Jul 31, 2019
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Commits on Aug 1, 2019

  1. egl/drm: ensure the backing gbm is set before using it

    Currently, if we error out before gbm_dri is set (say due to a different
    name of the backing GBM implementation, or otherwise) the tear down will
    trigger a NULL ptr deref and crash out.
    
    Move the gbm_dri initialization as early as possible.
    
    v2: Drop check in dri2_teardowm_drm (Eric)
    
    Reported-by: Christian Gmeiner <christian.gmeiner@gmail.com>
    Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
    Cc: mesa-stable@lists.freedesktop.org
    Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    (cherry picked from commit 72b97ad)
    evelikov-work authored and jasuarez committed Aug 1, 2019
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  2. nir: remove explicit nir_intrinsic_index_flag values

    These were left after a rebase and happen to make
    NIR_INTRINSIC_SWIZZLE_MASK == NIR_INTRINSIC_SRC_ACCESS, which is how it
    was noticed.
    
    Fixes: 6f20643 ("nir: Allow qualifiers on copy_deref and image instructions")
    Cc: Connor Abbott <cwabbott0@gmail.com>
    Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
    Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
    Reviewed-by: Eric Anholt <eric@anholt.net>
    (cherry picked from commit 5d7bcac)
    1ace authored and jasuarez committed Aug 1, 2019
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Commits on Aug 2, 2019

  1. intel/ir: Fix CFG corruption in opt_predicated_break().

    Specifically the optimization of a conditional BREAK + WHILE sequence
    into a conditional WHILE seems pretty broken.  The list of successors
    of "earlier_block" (where the conditional BREAK was found) is emptied
    and then re-created with the same edges for no apparent reason.  On
    top of that the list of predecessors of the block immediately after
    the WHILE loop is emptied, but only one of the original edges will be
    added back, which means that potentially several blocks that still
    have it on their list of successors won't be on its list of
    predecessors anymore, causing all sorts of hilarity due to the
    inconsistency in the control flow graph.
    
    The solution is to remove the code that's removing valid edges from
    the CFG.  cfg_t::remove_block() will already clean up after itself.
    The assert in bblock_t::combine_with() also needs to be removed since
    we will be merging a block with multiple children into the first one
    of them.
    
    Found the issue on a hardware enabling branch originally, but
    apparently somebody reproduced the same problem independently on
    master in the meantime.
    
    Fixes: d13bcdb ("i965/fs: Extend predicated break pass to predicate WHILE.")
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111009
    Cc: jiradet.jd@gmail.com
    Cc: Sergii Romantsov <sergii.romantsov@globallogic.com>
    Cc: Matt Turner <mattst88@gmail.com>
    Cc: mesa-stable@lists.freedesktop.org
    Tested-by: Paul Chelombitko <qamonstergl@gmail.com>
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    (cherry picked from commit 54fbc62)
    curro authored and jasuarez committed Aug 2, 2019
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Commits on Aug 6, 2019

  1. mesa: add glsl_type ref to one_time_init and decref to atexit

    This fixes problems spotted within vk-gl-cts. Problem is that the builtin
    functions refer to types and we should not release types before builtins
    are released.
    
    Fixes: 624789e ("compiler/glsl: handle case where we have multiple users for types")
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110796
    Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
    Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    tpalli committed Aug 6, 2019
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Commits on Aug 7, 2019

  1. Update version to 19.1.4

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Aug 7, 2019
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  2. docs: add release notes for 19.1.4

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Aug 7, 2019
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  3. docs: add sha256 checksums for 19.1.4

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Aug 7, 2019
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  4. i965/clear: clear_value better precision

    Test-case with depth-clear 0.5 and format
    MESA_FORMAT_Z24_UNORM_X8_UINT fails due inconsistent
    clear-value of 0.4999997.
    Maybe its better to improve?
    
    CC: Jason Ekstrand <jason.ekstrand@intel.com>
    Fixes: 0ae9ce0 (i965/clear: Quantize the depth clear value based on the format)
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111113
    Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
    Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
    Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
    (cherry picked from commit a86eccf)
    Sergii Romantsov authored and jasuarez committed Aug 7, 2019
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Commits on Aug 8, 2019

  1. cherry-ignore: panfrost: Make ctx->job useful

    Fixes: This commit does not apply cleanly on 19.1 branch, as it depends
    on other commits not present in the branch.
    
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Aug 8, 2019
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  2. anv: Emit a dummy MEDIA_VFE_STATE before switching from GPGPU to 3D

    There is an object-level  preemption workaround which requires this.
    However, even without object-level preemption, we seem to have issues
    with geometry flickering when 3D and compute are combined in the same
    batch and this appears to fix it.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109630
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111267
    Cc: mesa-stable@lists.freedesktop.org
    Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
    (cherry picked from commit bc61253)
    gfxstrand authored and jasuarez committed Aug 8, 2019
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  3. radv: Do non-uniform lowering before bool lowering.

    Since it can introduce comparisons.
    
    Fixes: 028ce52 "radv: Add non-uniform indexing lowering."
    Reviewed-by: Dave Airlie <airlied@redhat.com>
    Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    (cherry picked from commit 2301b2e)
    BNieuwenhuizen authored and jasuarez committed Aug 8, 2019
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  4. ac/nir: Use correct cast for readfirstlane and ptrs.

    Fixes: 028ce52 "radv: Add non-uniform indexing lowering."
    Reviewed-by: Dave Airlie <airlied@redhat.com>
    Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    (cherry picked from commit 2af00b1)
    BNieuwenhuizen authored and jasuarez committed Aug 8, 2019
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  5. radeonsi: disable SDMA image copies on dGPUs to fix corruption in games

    Cc: 19.1 19.2 <mesa-stable@lists.freedesktop.org>
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
    (cherry picked from commit 6b3ee86)
    [Juan A. Suarez: resolve trivial conflicts]
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    
    Conflicts:
    	src/gallium/drivers/radeonsi/cik_sdma.c
    Marek Olšák authored and jasuarez committed Aug 8, 2019
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  6. meson: Test for program_invocation_name

    program_invocation_name and program_invocation_short_name are both GNU
    extensions. I don't believe one can exist without the other, so only
    check for program_invocation_name.
    
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    (cherry picked from commit c9b86cf)
    mattst88 authored and jasuarez committed Aug 8, 2019
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  7. util: fix mem leak of program path

    Fixes: 759b940 ("util: Get program name based on path when possible")
    Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
    Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
    (cherry picked from commit 5b10ddf)
    1ace authored and jasuarez committed Aug 8, 2019
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  8. gallium/dump: add missing query-type to short-list

    Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
    Fixes: a677799 ("gallium: add PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE
                         and corresponding cap")
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    (cherry picked from commit 70a9392)
    kusma authored and jasuarez committed Aug 8, 2019
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  9. gallium/dump: add missing query-type to short-list

    Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
    Fixes: 3f6b3d9 ("gallium: add PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE")
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    (cherry picked from commit da9e295)
    kusma authored and jasuarez committed Aug 8, 2019
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Commits on Aug 10, 2019

  1. radv: Avoid binning RAVEN hangs.

    Mirroring radeonsi.
    
    CC: <mesa-stable@lists.freedesktop.org>
    Reviewed-by: Dave Airlie <airlied@redhat.com>
    (cherry picked from commit 4a3f987)
    [Juan A. Suarez: resolve trivial conflicts]
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    
    Conflicts:
    	src/amd/vulkan/radv_pipeline.c
    BNieuwenhuizen authored and jasuarez committed Aug 10, 2019
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  2. radv: Avoid VEGA/RAVEN scissor bug in binning.

    CC: <mesa-stable@lists.freedesktop.org>
    Reviewed-by: Dave Airlie <airlied@redhat.com>
    (cherry picked from commit 23a9d20)
    [Juan A. Suarez: resolve trivial conflicts]
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    
    Conflicts:
    	src/amd/vulkan/radv_pipeline.c
    BNieuwenhuizen authored and jasuarez committed Aug 10, 2019
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  3. i965: Emit a dummy MEDIA_VFE_STATE before switching from GPGPU to 3D

    There is an object-level  preemption workaround which requires this.
    However, even without object-level preemption, we seem to have issues
    with geometry flickering when 3D and compute are combined in the same
    batch and this appears to fix it.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110395
    Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
    Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
    Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
    Cc: mesa-stable@lists.freedesktop.org
    (cherry picked from commit b8842bc)
    Danylo Piliaiev authored and jasuarez committed Aug 10, 2019
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  4. anv: remove unused Linux-specific include

    Fixes: 4201cc2 ("anv: Implement VK_KHX_external_semaphore_fd")
    Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    (cherry picked from commit 2be3f16)
    valpackett authored and jasuarez committed Aug 10, 2019
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  5. intel/perf: use MAJOR_IN_SYSMACROS/MAJOR_IN_MKDEV

    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    Fixes: 134e750 ("i965: extract performance query metrics")
    (cherry picked from commit ac15610)
    valpackett authored and jasuarez committed Aug 10, 2019
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Commits on Aug 20, 2019

  1. radeonsi: fix an assertion failure: assert(!res->b.is_shared)

    This only appears to happen on Raven2.
    
    Possible way to reproduce:
    
    resource_get_handle(WINSYS_HANDLE_TYPE_KMS) --> sets is_shared = true
    resource_get_handle(WINSYS_HANDLE_TYPE_DMABUF) --> fail
    
    Cc: 19.1 19.2 <mesa-stable@lists.freedesktop.org>
    (cherry picked from commit 8d0d753)
    Marek Olšák authored and jasuarez committed Aug 20, 2019
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Commits on Aug 23, 2019

  1. Update version to 19.1.5

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Aug 23, 2019
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  2. docs: add release notes for 19.1.5

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Aug 23, 2019
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  3. docs: add sha256 checksums for 19.1.5

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Aug 23, 2019
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  4. nir/lcssa: handle deref instructions properly

    Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
    Fixes: 414148c "nir: Support deref instructions in loop_analyze"
    (cherry picked from commit 204846a)
    daniel-schuermann authored and jasuarez committed Aug 23, 2019
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  5. gallium/vl: use compute preference for all multimedia, not just blit

    The compute paths in vl are a bit AMD-specific. For example, they (on
    nouveau), try to use a BGRX8 image format, which is not supported.
    Fixing all this is probably possible, but since the compute paths aren't
    in any way better, it's difficult to care.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111213
    Fixes: 9364d66 (gallium/auxiliary/vl: Add video compositor compute shader render)
    Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    (cherry picked from commit 958390a)
    [Juan A. Suarez: resolve trivial conflicts]
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    
    Conflicts:
    	src/gallium/auxiliary/util/u_screen.c
    	src/gallium/docs/source/screen.rst
    	src/gallium/drivers/radeonsi/si_get.c
    	src/gallium/include/pipe/p_defines.h
    imirkin authored and jasuarez committed Aug 23, 2019
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  6. nir/loop_unroll: Prepare loop for unrolling in wrapper_unroll

    Without loop_prepare_for_unroll loops are losing phis.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111411
    Fixes: 5db9819 "nir: add loop unroll support for wrapper loops"
    Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
    Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
    (cherry picked from commit 84b3ef6)
    Danylo Piliaiev authored and jasuarez committed Aug 23, 2019
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Commits on Aug 26, 2019

  1. cherry-ignore: add explicit 19.2 only nominations

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Aug 26, 2019
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  2. cherry-ignore: iris: Replace devinfo->gen with GEN_GEN

    Fixes: This commit does not apply cleanly on 19.1 branch, as it depends
    on other commits not present in the branch.
    
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Aug 26, 2019
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  3. iris: Fix broken aux.possible/sampler_usages bitmask handling

    For renderable surfaces, we allocate SURFACE_STATEs for each bit in
    res->aux.possible_usages.  Sampler views use res->aux.sampler_usages.
    
    When pinning buffers, we call surf_state_offset_for_aux() to calculate
    the offset to the desired surface state.  surf_state_offset_for_aux()
    took an aux_modes parameter, which should be one of those two fields.
    However...it was not using that parameter.  It always used the broader
    res->aux.possible_usages field directly.
    
    One of the callers, update_clear_value(), was passing incorrect masks
    for this parameter.  It iterated through the bits in order, using
    u_bit_scan(), which destructively modifies the mask.  So each time we
    called it, the count of bits before our selected mode was 0, which would
    cause us to always update the SURFACE_STATE for ISL_AUX_USAGE_NONE,
    rather than updating each in turn.  This was hidden by the earlier bug
    where surf_state_offset_for_aux() ignored the parameter.
    
    Fixes: 7339660 ("iris: Add aux.sampler_usages.")
    Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
    (cherry picked from commit 117a036)
    [Juan A. Suarez: resolve trivial conflicts]
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    
    Conflicts:
    	src/gallium/drivers/iris/iris_state.c
    kaydenl authored and jasuarez committed Aug 26, 2019
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  4. cherry-ignore: iris: Update fast clear colors on Gen9 with direct imm…

    …ediate writes.
    
    Fixes: This commit does not apply cleanly on 19.1 branch, as it depends
    on other commits not present in the branch.
    
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Aug 26, 2019
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  5. iris: Drop copy format hacks from copy region based transfer path.

    This doesn't work for compressed formats, as the source texture and
    temporary texture would have different block sizes.  (Forcing the driver
    to always take the GPU path would expose the bug.)  Instead, just use
    the source format for the temporary, and let blorp_copy deal with
    overrides.
    
    The one case where we can't do this is ASTC, because isl won't let us
    create a linear ASTC surface.  Fall back to the CPU paths there for now.
    
    Fixes: 9d1334d ("iris: Use copy_region and staging resources to avoid transfer stalls")
    Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
    (cherry picked from commit 136629a)
    kaydenl authored and jasuarez committed Aug 26, 2019
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  6. cherry-ignore: iris: Avoid unnecessary resolves on transfer maps

    Fixes: The following commit depends on commits 77a1070 and
    df4c2ec in order to compile, which did not land in the branch.
    
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Aug 26, 2019
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  7. egl: reset blob cache set/get functions on terminate

    Fixes errors seen with eglSetBlobCacheFuncsANDROID on Android when
    running dEQP that terminates and reinitializes a display.
    
    Fixes: 6f5b570 "egl: add support for EGL_ANDROID_blob_cache"
    Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    (cherry picked from commit 3e03a3f)
    tpalli authored and jasuarez committed Aug 26, 2019
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  8. iris: Fix large timeout handling in rel2abs()

    ...by copying the implementation of anv_get_absolute_timeout().
    
    Appears to fix a CTS test with 32-bit builds:
    GTF-GL46.gtf32.GL3Tests.sync.sync_functionality_clientwaitsync_flush
    
    Fixes: f459c56 ("iris: Add fence support using drm_syncobj")
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
    Reviewed-by: Eric Engestrom <eric@engestrom.ch>
    (cherry picked from commit 7ee7b0e)
    kaydenl authored and jasuarez committed Aug 26, 2019
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  9. radv: additional query fixes

    Make sure we read the updated data from the gpu in cases where WAIT_BIT
    is not set.
    
    Cc: 19.1 19.2 <mesa-stable@lists.freedesktop.org
    Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
    Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
    (cherry picked from commit a410823)
    [Juan A. Suarez: resolve trivial conflicts]
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    
    Conflicts:
    	src/amd/vulkan/radv_query.c
    lostgoat authored and jasuarez committed Aug 26, 2019
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  10. wayland/egl: Ensure correct buffer size when allocating

    Whenever a buffer is allocated, e.g. by the first draw call or EGL call after a
    buffer swap, make sure the size is up to date. Prior to this commit, we
    failed to do so when querying the buffer age, or swapping buffers
    without any prior EGL call or draw call.
    
    Signed-off-by: Jonas Ådahl <jadahl@gmail.com>
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    (cherry picked from commit 903ad59)
    jadahl authored and jasuarez committed Aug 26, 2019
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Commits on Aug 27, 2019

  1. intel/fs: grab fail_msg from v32 instead of v16 when v32->run_cs fails

    Looks like a copy/paste error. This patch prevents a segfault when
    running the following on BDW:
    
        INTEL_DEBUG=no8,no16,do32 ./deqp-vk -n \
            dEQP-VK.subgroups.arithmetic.compute.subgroupmin_dvec4
    
    For the curious, the message we're getting is:
    
        CS compile failed: Failure to register allocate.  Reduce number
        of live scalar values to avoid this.
    
    Fixes: 864737c ("i965/fs: Build 32-wide compute shader when needed.")
    Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
    Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
    (cherry picked from commit 848d5e4)
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    [Juan A. Suarez: resolve trivial conflicts]
    
    Conflicts:
    	src/intel/compiler/brw_fs.cpp
    pzanoni-intel authored and jasuarez committed Aug 27, 2019
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Commits on Aug 28, 2019

  1. radeonsi: fix scratch buffer WAVESIZE setting leading to corruption

    Cc: 19.2 19.1 <mesa-stable@lists.freedesktop.org>
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
    (cherry picked from commit 360cf3c)
    Marek Olšák authored and jasuarez committed Aug 28, 2019
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  2. util: Add a _mesa_i64roundevenf() helper.

    This always returns a int64_t, translating to _mesa_lroundevenf on
    systems where long is 64-bit, and llrintf where "long long" is needed.
    
    Fixes: 594fc0f ("mesa: Replace F_TO_I() with _mesa_lroundevenf().")
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    (cherry picked from commit b59914e)
    kaydenl authored and jasuarez committed Aug 28, 2019
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  3. mesa: Fix _mesa_float_to_unorm() on 32-bit systems.

    This fixes the following CTS test on 32-bit systems:
    GTF-GL46.gtf30.GL3Tests.packed_depth_stencil.packed_depth_stencil_init
    
    It does glGetTexImage of a 16-bit SNORM image, requesting 32-bit UNORM
    data.  In get_tex_rgba_uncompressed, we round trip through float to
    handle image transfer ops for clamping.  _mesa_format_convert does:
    
       _mesa_float_to_unorm(0.571428597f, 32)
    
    which translated to:
    
       _mesa_lroundevenf(0.571428597f * 0xffffffffu)
    
    which produced different results on 64-bit and 32-bit systems:
    
       64-bit: result = 0x92492500
       32-bit: result = 0x80000000
    
    This is because the size of "long" varies between the two systems, and
    0x92492500 is too large to fit in a signed 32-bit integer.  To fix this,
    we switch to the new _mesa_i64roundevenf function which always does the
    64-bit operation.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104395
    Fixes: 594fc0f ("mesa: Replace F_TO_I() with _mesa_lroundevenf().")
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    (cherry picked from commit e18cd54)
    kaydenl authored and jasuarez committed Aug 28, 2019
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Commits on Aug 29, 2019

  1. intel/compiler: Fix src0/desc setter ordering

    src0 vstride and type overlap with bits of the extended descriptor.
    brw_set_desc() also sets the extended descriptor to 0.  So by setting
    the descriptor, then setting src0, we were accidentally setting a bunch
    of extended descriptor bits unintentionally.
    
    When using this infrastructure for framebuffer writes (in a future
    patch), this ended up setting the extended descriptor bit 20, which is
    "Null Render Target" on Icelake, causing nothing to be written to the
    framebuffer.
    
    Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
    (cherry picked from commit c8c9c48)
    kaydenl authored and jasuarez committed Aug 29, 2019
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  2. nir/algrbraic: Don't optimize open-coded bitfield reverse when loweri…

    …ng is enabled
    
    This caused a problem on Sandybridge where an open-coded
    bitfieldReverse() function could be optimized to a
    nir_op_bitfield_reverse that would generate an unsupported BFREV
    instruction in the backend.  This was encountered in some Unreal4 tech
    demos in shader-db.  The bug was not previously noticed because we don't
    actually try to run those demos on Sandybridge.
    
    The fixes tag is a bit a lie.  The actual bug was introduced about
    26,000 commits earlier in 371c4b3 ("nir: Recognize open-coded
    bitfield_reverse.").  Without the NIR lowering pass, the flag needed to
    avoid the optimization does not exist.  Hopefully nobody will care to
    fix this on an earlier Mesa release.
    
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    Fixes: 7afa26d ("nir: Add lowering for nir_op_bitfield_reverse.")
    (cherry picked from commit d3fd1c7)
    ianromanick authored and jasuarez committed Aug 29, 2019
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  3. intel/compiler: Request bitfield_reverse lowering on pre-Gen7 hardware

    See the previous commit for the explanation of the Fixes tag.
    
    Hurts 21 shaders in shader-db.  All of the hurt shaders are in Unreal
    Engine 4 tech demos.
    
    Reviewed-by: Matt Turner <mattst88@gmail.com>
    Fixes: 7afa26d ("nir: Add lowering for nir_op_bitfield_reverse.")
    (cherry picked from commit b418269)
    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    [Juan A. Suarez: resolve trivial conflicts]
    
    Conflicts:
    	src/intel/compiler/brw_compiler.c
    ianromanick authored and jasuarez committed Aug 29, 2019
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Commits on Aug 30, 2019

  1. glsl: replace 'x + (-x)' with constant 0

    This fixes a hang in shadertoy for radeonsi where a buffer was initialized with:
    
       value -= value
    
    with value being undefined.
    In this case LLVM replace the operation with an assignment to NaN.
    
    Cc: 19.1 19.2 <mesa-stable@lists.freedesktop.org>
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111241
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    (cherry picked from commit 47cc660)
    peppsac authored and jasuarez committed Aug 30, 2019
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Commits on Sep 3, 2019

  1. Update version to 19.1.6

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Sep 3, 2019
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  2. docs: add release notes for 19.1.6

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Sep 3, 2019
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  3. docs: add sha256 checksums for 19.1.6

    Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
    jasuarez committed Sep 3, 2019
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  4. INTERNAL: i965: Relax permissions when we export prime handle for GEM.

    This is needed in case we want to use mmap with dma-buf and
    write into the buffer in CPU side. This is useful when
    layers are rendered using software and we will either
    need to scan or texture from these layers.
    Check: https://patchwork.freedesktop.org/patch/56380/
    
    Signed-off-by: Kalyan Kondapally <kalyan.kondapally@intel.com>
    kalyankondapally authored and strassek committed Sep 3, 2019
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  5. Configuration menu
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  6. Configuration menu
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  7. INTERNAL: ignore some compile warning on android.

    Signed-off-by: Qiming Shi <qiming.shi@intel.com>
    Signed-off-by: Mingwei Wang <mingwei.wang@intel.com>
    Signed-off-by: jenny.q.cao <jenny.q.cao@intel.com>
    Signed-off-by: Kishore Kadiyala <kishore.kadiyala@intel.com>
    Signed-off-by: Chen Lin Z <lin.z.chen@intel.com>
    jennycao authored and strassek committed Sep 3, 2019
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  8. INTERNAL: enable O3 for Mesa compilation.

    Improves performance of graphics tests significantly.
    
    Signed-off-by: Yogesh Marathe <yogesh.marathe@intel.com>
    Acked-by: Tapani Pälli <tapani.palli@intel.com>
    yogesh-marathe authored and strassek committed Sep 3, 2019
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  9. INTERNAL: Enable sampling for imported dma_buf images

    The HWC Vulkan backend needs to be able to sample from source images, so for
    now enable that for all users of vkCreateDmaBufImageINTEL. We can revert
    this patch once we land support for VK_MESAX_external_image_dma_buf, which
    allows the application to fill the 'usage' field.
    
    Jira: IAHWC-40
    Test: Enable Vulkan backend of IA-Hardware-Composer and try kmscube.
          The cube should be visible and animated, but at this time there is
          severe flickering.
    
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    Acked-by: Tapani Pälli <tapani.palli@intel.com>
    strassek committed Sep 3, 2019
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  10. INTERNAL: Add format P010 etc for 10bit/12bit/16bit YUV420 formats

    Add those definition in dri2_interface.h and in intel_screen.c
    This will make P010 formats be sampleable in OpenGL
    
    Signed-off-by: Lin Johnson <johnson.lin@intel.com>
    [strassek: Paired down, much of the patch has gone upstream]
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    js0701 authored and strassek committed Sep 3, 2019
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  11. INTERNAL: prevent deadlock in droid_query_buffer_age

    To avoid blocking other EGL calls, release the display mutex before
    calling update_buffers(), which will call droid_window_dequeue_buffer().
    
    This patch fixes some failure cases in android graphics cts test.
    
    Signed-off-by: Min He <min.he@intel.com>
    Signed-off-by: Chenglei Ren <chenglei.ren@intel.com>
    Min He authored and strassek committed Sep 3, 2019
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  12. FROMLIST: Check if the window is non-NULL before setting swap interval.

    This fixes crash due to NULL window when swap interval is set
    for pbuffer surface.
    
    Jira: 61995
    Test: CtsDisplayTestCases pass
    
    Signed-off-by: samiuddi <sami.uddin.mohammad@intel.com>
    
    (am from https://patchwork.freedesktop.org/patch/235697/)
    samiuddi authored and strassek committed Sep 3, 2019
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  13. INTERNAL: Add ReadMe file.

    Signed-off-by: Kalyan Kondapally <kalyan.kondapally@intel.com>
    kalyankondapally authored and strassek committed Sep 3, 2019
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  14. INTERNAL: glcpp: Hack to handle expressions in #line directives.

    GLSL ES 320 technically allows #line to have arbitrary expression trees
    rather than integer literal constants, unlike the C and C++ preprocessor.
    This is likely a completely unused feature that does not make sense.
    
    However, Android irritatingly mandates this useless behavior, so this
    patch implements a hack to try and support it.
    
    We handle a single expression:
    
        #line <line number expression>
    
    but we avoid handling the double expression:
    
        #line <line number expression> <source string expression>
    
    because this is an ambiguous grammar.  Instead, we handle the case that
    wraps both in parenthesis, which is actually well defined:
    
        #line (<line number expression>) (<source string expression>)
    
    With this change following tests pass:
    
       dEQP-GLES3.functional.shaders.preprocessor.builtin.line_expression_vertex
       dEQP-GLES3.functional.shaders.preprocessor.builtin.line_expression_fragment
       dEQP-GLES3.functional.shaders.preprocessor.builtin.line_and_file_expression_vertex
       dEQP-GLES3.functional.shaders.preprocessor.builtin.line_and_file_expression_fragment
    
    Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
    Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
    
    BUG=b:33352633
    BUG=b:33247335
    TEST=affected tests passing on CTS 7.1_r1 sentry
    
    Change-Id: I7afbbb386bd4a582e3f241014a83eaccad1d50d9
    Reviewed-on: https://chromium-review.googlesource.com/427305
    Tested-by: Haixia Shi <hshi@chromium.org>
    Reviewed-by: Ilja H. Friedel <ihf@chromium.org>
    Commit-Queue: Haixia Shi <hshi@chromium.org>
    Trybot-Ready: Haixia Shi <hshi@chromium.org>
    kaydenl authored and strassek committed Sep 3, 2019
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  15. INTERNAL: anv: disable extensions for Android CTS

    This change makes following test pass:
    	dEQP-VK.api.info.device.extensions
    
    Originally-from: Tapani Pälli <tapani.palli@intel.com>
    Test: [CTS 9.0_r9] dEQP-VK.api.info.device.extensions
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    strassek committed Sep 3, 2019
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  16. INTERNAL: i965: perf: implement GPA's null renderer

    GPA requires a null renderer query which disables all rendering. This
    feels fairly at odds with the spirit of the INTEL_performance_query
    extension.
    
    [strassek: Tracking INTEL_blackhole_render as the long term solution.
     https://www.khronos.org/registry/OpenGL/extensions/INTEL/INTEL_blackhole_render.txt
     https://patchwork.freedesktop.org/series/40035/]
    Test: mdapi test_GfxDrv_DriverAcceptance test case
    Test: GfxDrv_DriverAcceptanceQuery.GL_NULL_HARDWARE
    llandwerlin-intel authored and strassek committed Sep 3, 2019
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  17. FROMLIST: SQUASH: i965: SIMD32 selection heuristics

    (cover letter https://patchwork.freedesktop.org/series/51006/)
    
    FROMLIST: i965: SIMD32 heuristics debug flag
    
    Added a new DEBUG_HEUR32 flag to INTEL_DEBUG flags for enabling SIMD32
    selection heuristics.
    
    (am from https://patchwork.freedesktop.org/patch/256764/)
    
    FROMLIST: i965: SIMD32 heuristics control data
    
    Added a new structure for holding SIMD32 heuristics control data. The
    control data itself will be fetched from drirc.
    
    (am from https://patchwork.freedesktop.org/patch/256806/)
    
    FROMLIST: i965: SIMD32 heuristics control data from drirc
    
    To be able to test the heuristics with different parameters, they can be
    controlled via environment variables through drirc.
    
    (am from https://patchwork.freedesktop.org/patch/256788/)
    
    FROMLIST: mesa: Helper functions for counting set bits in a mask
    
    (am from https://patchwork.freedesktop.org/patch/256765/)
    
    FROMLIST: i965/fs: Save the instruction count of each dispatch width
    
    The SIMD32 selection heuristics will use this information for deciding whether
    SIMD32 shaders should be used.
    
    (am from https://patchwork.freedesktop.org/patch/256793/)
    
    FROMLIST: i965/fs: SIMD32 selection heuristic based on grouped texture fetches
    
    The function goes through the compiled shader and checks how many grouped
    texture fetches there are. This is a simple heuristic which gets rid of most
    of the regressions when enabling SIMD32 shaders but still retains some of
    the benefits.
    
    (am from https://patchwork.freedesktop.org/patch/256798/)
    
    FROMLIST: i965/fs: Enable all SIMD32 heuristics
    
    There are three simple heuristics for SIMD32 shader enabling:
    
    - How many MRTs does the shader write into?
    - How many grouped texture fetches does the shader have?
    - How many instructions does the SIMD32 shader have compared to the SIMD16
       shader?
    
    For testing purposes, the heuristics can be controlled via these environment
    variables:
    
    simd32_heuristic_mrt_check
    - Enables MRT write check
    - Default: true
    
    simd32_heuristic_max_mrts
    - How many MRT writes the heuristic allows
    - Default: 1
    
    simd32_heuristic_grouped_check
    - Enables grouped texture fetch check
    - Default: true
    
    simd32_heuristic_grouped_sends
    - How many grouped texture fetches the heuristic allows
    - Default: 6
    
    simd32_heuristic_inst_check
    - Enables SIMD32 vs. SIMD16 instruction count check
    - Default: true
    
    simd32_heuristic_inst_ratio
    - SIMD32 vs. SIMD16 instruction count ratio the heuristic allows
    - Default: 2.3
    
    SIMD32 shaders will not be compiled also when SIMD16 compilation fails or
    spills.
    
    (am from https://patchwork.freedesktop.org/patch/256766/)
    Toni Lönnberg authored and strassek committed Sep 3, 2019
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  18. Revert "FROMLIST: SQUASH: i965: SIMD32 selection heuristics"

    This patch is causing visual artifacts on Celadon home screen, which is
    troubling because it is supposed to be disabled by default. Reverting until we
    find a solution.
    strassek committed Sep 3, 2019
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  19. UPSTREAM: egl: Enable eglGetPlatformDisplay on Android Platform

    This helps to add eglGetPlatformDisplay support on Android
    Platform.
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    
    (cherry picked from commit 500b45a)
    renchenglei authored and strassek committed Sep 3, 2019
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  20. FROMLIST: glsl: fix an incorrect max_array_access after optimization …

    …of ssbo/ubo
    
    This is needed to fix these tests:
    piglit.spec.arb_shader_storage_buffer_object.compiler.unused-array-element_frag
    piglit.spec.arb_shader_storage_buffer_object.compiler.unused-array-element_comp
    
    Fixes: 8cf1333 "glsl: link uniform block arrays of arrays"
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109532
    Reported-By: Ilia Mirkin <imirkin@alum.mit.edu>
    Tested-by: Fritz Koenig <frkoenig@google.com>
    Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
    
    TEST=[CTS 9.0_r8} dEQP-GLES31.functional.ssbo.layout.random.all_per_block_buffers#18
    (am from https://gitlab.freedesktop.org/mesa/mesa/merge_requests/332)
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    asimiklit authored and strassek committed Sep 3, 2019
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  21. FROMLIST: glsl: fix a binding points assignment for ssbo/ubo arrays

    This is needed to be in agreement with spec requirements:
    KhronosGroup/OpenGL-API#46
    
    Piers Daniell:
       "We discussed this in the OpenGL/ES working group meeting
        and agreed that eliminating unused elements from the interface
        block array is not desirable. There is no statement in the spec
        that this takes place and it would be highly implementation
        dependent if it happens. If the application has an "interface"
        in the shader they need to match up with the API it would be
        quite confusing to have the binding point get compacted.
        So the answer is no, the binding points aren't affected by
        unused elements in the interface block array."
    
    v2: - 'original_dim_size' field moved above to keep
          the struct packed better on 64-bit
        - added a comment for 'total_num_array_elements' field
        - fixed a binding point calculations for SSBOs array of arrays
              ( Ian Romanick <ian.d.romanick@intel.com> )
        - fixed binding point calculations for non-packed SSBOs
    
    Fixes: 8cf1333 "glsl: link uniform block arrays of arrays"
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109532
    Reported-By: Ilia Mirkin <imirkin@alum.mit.edu>
    Tested-by: Fritz Koenig <frkoenig@google.com>
    Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
    
    TEST=[CTS 9.0_r8} dEQP-GLES31.functional.ssbo.layout.random.all_per_block_buffers#18
    (am from https://gitlab.freedesktop.org/mesa/mesa/merge_requests/332)
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    asimiklit authored and strassek committed Sep 3, 2019
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  22. FROMLIST: glsl/nir: do not change an element index to have correct bl…

    …ock name
    
    Fixes: 810dde2 "glsl/nir: Add a pass to lower UBO and SSBO access"
    Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
    
    TEST=[CTS 9.0_r8} dEQP-GLES31.functional.ssbo.layout.random.all_per_block_buffers#18
    (am from https://gitlab.freedesktop.org/mesa/mesa/merge_requests/332)
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    asimiklit authored and strassek committed Sep 3, 2019
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  23. UPSTREAM: mesa: android: Remove unnecessary dependency tracking rules

    The current AOSP master build system breaks building mesa due to the
    following error:
    
    external/mesa3d/src/compiler/Android.glsl.gen.mk:94: error:
      writing to readonly directory: "external/mesa3d/src/compiler/glsl/ir.h"
    
    This error is bogus -- nothing "writes" to ir.h -- but the rule is
    unnecessary because the generated header that is a dependency of the
    non-generated header should be added to LOCAL_GENERATED_SOURCES and this
    will track if the dependency needs to be regenerated.
    
    (This change fixes a similar problem affecting nir.h too.)
    
    Cc: Rob Clark <robdclark@chromium.org>
    Cc: Emil Velikov <emil.l.velikov@gmail.com>
    Cc: Amit Pundir <amit.pundir@linaro.org>
    Cc: Sumit Semwal <sumit.semwal@linaro.org>
    Cc: Alistair Strachan <astrachan@google.com>
    Cc: Greg Hartman <ghartman@google.com>
    Cc: Tapani Pälli <tapani.palli@intel.com>
    Cc: Jason Ekstrand <jason@jlekstrand.net>
    Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
    Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
    Signed-off-by: Alistair Strachan <astrachan@google.com>
    [jstultz: Forward ported and tweaked commit subject]
    Signed-off-by: John Stultz <john.stultz@linaro.org>
    (cherry picked from commit 0fda3ea)
    Alistair Strachan authored and strassek committed Sep 3, 2019
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Commits on Sep 12, 2019

  1. UPSTREAM: drm-uapi: Update headers for fp16 formats

    From drm-next commit 88ab9c76d191ad8645b483f31e2b394b0f3e280e
    
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    Reviewed-by: Adam Jackson <ajax@redhat.com>
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
    (cherry picked from commit d07a56d)
    strassek committed Sep 12, 2019
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  2. UPSTREAM: i965: Add helper function for allowed config formats

    The driver checks dri config options and loader caps to filter out certain
    formats during config creation. Fold 4 call sites under a single helper
    function.
    
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
    (cherry picked from commit 4fb7160)
    strassek committed Sep 12, 2019
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  3. UPSTREAM: gallium: Use consistent approach for config format filtering

    rgb10 uses an 'if(allowed) continue' approach, do the same for rgba_ordering.
    
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
    (cherry picked from commit 9328e7c)
    strassek committed Sep 12, 2019
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  4. UPSTREAM: dri: Add config attributes for color channel shift

    The existing mask attributes can only support up to 32 bpp. Introduce
    per-channel SHIFT attributes that indicate how many bits, from lsb towards
    msb, the bit field is offset. A shift of -1 will indicate that there is no
    bit field set for the channel.
    
    As old loaders will still be looking for masks, we set the masks to 0 for
    any formats wider than 32 bpp.
    
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    Reviewed-by: Adam Jackson <ajax@redhat.com>
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
    (cherry picked from commit 5a74730)
    strassek committed Sep 12, 2019
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  5. UPSTREAM: util: move bitcount to bitscan.h

    bitcount is free from the pipe header dependencies that make u_math.h hard
    to include by non-gallium specific code, so move it to bitscan.h. bitscan.h
    is included by u_math.h so existing references will continue working.
    
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
    (cherry picked from commit 3562f48)
    strassek committed Sep 12, 2019
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  6. UPSTREAM: egl: Convert configs to use shifts and sizes instead of masks

    Change dri2_add_config to take arrays of shifts and sizes, and compare with
    those set in the dri config. Convert all platform driver masks
    to shifts and sizes.
    
    In order to handle older drivers, where shift attributes aren't available,
    we fall back to the mask attributes and compute the shifts with ffs.
    
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
    (cherry picked from commit 7b4ed2b)
    strassek committed Sep 12, 2019
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  7. UPSTREAM: glx: Add fields for color shifts

    glx doesn't read the masks from the dri config directly, but for consistency
    add shifts to the glxconfig.
    
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    Reviewed-by: Adam Jackson <ajax@redhat.com>
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
    (cherry picked from commit d4a9010)
    strassek committed Sep 12, 2019
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  8. UPSTREAM: dri: Handle configs with floating point pixel data

    In order to handle pixel formats that consist of floating point data, enable
    floatMode field in the dri config, and set __DRI_ATTRIB_FLOAT_BIT in the
    render type attribute.
    
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    Reviewed-by: Adam Jackson <ajax@redhat.com>
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
    (cherry picked from commit 86d31c2)
    strassek committed Sep 12, 2019
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  9. UPSTREAM: egl: Handle dri configs with floating point pixel data

    In the case that __DRI_ATTRIB_FLOAT_BIT is set in the dri config, set
    EGL_COLOR_COMPONENT_TYPE_FLOAT_EXT in the egl config. Add a field to the
    platform driver visual to indicate if it has components that are in floating
    point form.
    
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    Reviewed-by: Adam Jackson <ajax@redhat.com>
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
    (cherry picked from commit 482ed43)
    strassek committed Sep 12, 2019
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  10. UPSTREAM: dri: Add fp16 formats

    Add dri formats for RGBA ordered 64 bpp IEEE 754 half precision floating
    point. Leverage existing offscreen render support for
    MESA_FORMAT_RGBA_FLOAT16 and MESA_FORMAT_RGBX_FLOAT16.
    
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    Reviewed-by: Adam Jackson <ajax@redhat.com>
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
    (cherry picked from commit a427c20)
    strassek committed Sep 12, 2019
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  11. UPSTREAM: gbm: Add buffer handling and visuals for fp16 formats

    Define and set a new loader cap DRI_LOADER_CAP_FP16, indicating that gbm can
    handle fp16 formats.
    
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    Reviewed-by: Adam Jackson <ajax@redhat.com>
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
    (cherry picked from commit 4861d2a)
    strassek committed Sep 12, 2019
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  12. UPSTREAM: i965: Add handling for fp16 configs

    Expose configs when allow_fp16_configs has been enabled and
    DRI_LOADER_CAP_FP16 is set in the loader.
    
    Also, define a new dri configuration option so users can disable exposure of
    fp16 formats. Make fp16 opt-in for i965.
    
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    Reviewed-by: Adam Jackson <ajax@redhat.com>
    Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
    (cherry picked from commit f4703f1)
    strassek committed Sep 12, 2019
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  13. UPSTREAM: gallium: Add buffer and configs handling or fp16 formats

    Expose configs when allow_fp16_configs has been enabled and
    DRI_LOADER_CAP_FP16 is set in the loader.
    
    Also, make kms_swrast_dri respect format bpp, to allow for allocating
    buffers wider than 32 bpp.
    
    Make fp16 opt-in for gallium.
    
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    Reviewed-by: Adam Jackson <ajax@redhat.com>
    Reviewed-by: Marek Olšák <marek.olsak@amd.com>
    Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
    (cherry picked from commit 5baff5d)
    strassek committed Sep 12, 2019
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  14. UPSTREAM: egl/android: Enable HAL_PIXEL_FORMAT_RGBA_FP16 format

    The patch adds support for 64 bit HAL_PIXEL_FORMAT_RGBA_FP16
    for android platform.
    
    Fixes android.graphics.cts.BitmapColorSpaceTest#test16bitHardware
    which failed in egl due to "Unsupported native buffer format 0x16"
    on chromebooks.
    
    Signed-off-by: Nataraj Deshpande <nataraj.deshpande@intel.com>
    Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
    (cherry picked from commit e3f54cb)
    nvdeshpande authored and strassek committed Sep 12, 2019
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  15. UPSTREAM: egl/android: Enable HAL_PIXEL_FORMAT_RGBA_1010102 format

    The patch adds support for HAL_PIXEL_FORMAT_RGBA_1010102 on
    Android platform.
    
    Fixes android.media.cts.DecoderTest#testVp9HdrStaticMetadata
    which failed in egl due to "Unsupported native buffer format 0x2b"
    on Android.
    
    Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
    Signed-off-by: Chenglei Ren <chenglei.ren@intel.com>
    (cherry picked from commit e2485bb)
    renchenglei authored and strassek committed Sep 12, 2019
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Commits on Sep 16, 2019

  1. FROMLIST: egl: Fix implicit declaration of ffs

    Found when building for Android in C99 mode. Include bitscan.h to ensure ffs is
    available.
    
    Fixes: 7b4ed2b ("egl: Convert configs to use shifts and sizes instead of masks")
    
    Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
    Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
    (cherry-picked from https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1973)
    strassek committed Sep 16, 2019
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Commits on Dec 18, 2019

  1. mesa: don't forget to clear _Layer field on texture unit

    On the Android Antutu benchmark we ran into an assert in ISL where the
    (base layer + num layers) > total layers. It turns out the core of
    mesa forgot to clear the _Layer variable, potentially leaving an
    inconsistent value.
    
    v2: Pull setting u->_Layer out of the conditional blocks (Jason)
    Signed-off-by: Lionel Landwerlin's avatarLionel Landwerlin <lionel.g.landwerlin@intel.com>
    Cc: <mesa-stable@lists.freedesktop.org>
    Reviewed-by: Eric Engestrom's avatarEric Engestrom <eric.engestrom@intel.com>
    Reviewed-by: Jason Ekstrand's avatarJason Ekstrand <jason@jlekstrand.net>
    
    https://gitlab.freedesktop.org/mesa/mesa/commit/2208d79ddeebd1673f477611d508566ef82bd7c0
    kanlihu committed Dec 18, 2019
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  2. enable GLX_USE_TLS on android

    On the Android deqp test when we run
    dEQP-EGL.functional.sharing.gles2.multithread.random.textures.gen_delete.15
    we will find two thread using one context. It will case gpu hang.
    kanlihu committed Dec 18, 2019
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  3. draw 2 prims in GL_PATCH mode.

    antutu 7.3 benchmark test will cause gpu hang
    when I draw 2 prims in one glDrawElements command, The gpu hang won't be reproduced.
    kanlihu committed Dec 18, 2019
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Commits on Dec 19, 2019

  1. Revert "egl/android: Update color_buffers querying for buffer age"

    This reverts commit 87efbe4.
    
    We got one PnP regression with 87efbe4. When we run Gfxbenchmark,
    there will be 50% drop(from ~60 to ~30) for case Manhattan. Let's
    revert this for a hot fix, which won't block the code integration.
    We will continue to debug this issue with upstream mesa.
    
    Signed-off-by: Chenglei Ren <chenglei.ren@intel.com>
    Tracked-On: OAM-OAM-88862
    renchenglei committed Dec 19, 2019
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Commits on Dec 20, 2019

  1. Merge pull request intel#139 from renchenglei/gfxbench

    Revert "egl/android: Update color_buffers querying for buffer age"
    feijiang1 authored Dec 20, 2019
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Commits on Dec 25, 2019

  1. Revert "draw 2 prims in GL_PATCH mode."

    This reverts commit 32ecd3b.
    renchenglei committed Dec 25, 2019
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  2. Revert "enable GLX_USE_TLS on android"

    This reverts commit 63f47da.
    renchenglei committed Dec 25, 2019
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Commits on Dec 26, 2019

  1. Merge pull request intel#142 from renchenglei/gfx_regression

    Fix Car Chase regression when running Gfxbench
    feijiang1 authored Dec 26, 2019
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Commits on Jan 19, 2020

  1. Enable Systrace/ATRACE in mesa on Android

    Enabling Systrace/ATRACE. for tracing the function call
    add MTRACE_BEGIN() at the beginning of function.
    and add MTRACE_END() before returnning from function.
    
    Tracked-On: None
    Signed-off-by: Shaofeng Tang <shaofeng.tang@intel.com>
    Shao-Feng committed Jan 19, 2020
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