CodePatch Support of PS Interpolation Improvement

CodePatch support with vectorMask predicate for PS interpolation improvement
intel · Jun 30, 2023 · 6e91a80 · 6e91a80
1 parent 07d8a21
commit 6e91a80
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Showing 7 changed files with 63 additions and 15 deletions.
diff --git a/IGC/Compiler/CISACodeGen/CISABuilder.cpp b/IGC/Compiler/CISACodeGen/CISABuilder.cpp
@@ -5509,6 +5509,17 @@ namespace IGC
             int_cast<unsigned short>(var->GetSize())));
     }
 
+    void CEncoder::DeclarePred(CVariable * var, uint offset)
+    {
+        // Avoid declaring more inputs/outputs than available registers
+        if (offset + var->GetSize() >= vKernel->getNumRegTotal() * getGRFSize())
+            return;
+        V(vKernel->CreateVISAPredVar(
+            var->visaPredVariable,
+            "",
+            int_cast<unsigned short>(var->GetSize())));
+    }
+
     void CEncoder::MarkAsOutput(CVariable* var)
     {
         for (unsigned int i = 0; i < var->GetNumberInstance(); i++)

diff --git a/IGC/Compiler/CISACodeGen/CISABuilder.hpp b/IGC/Compiler/CISACodeGen/CISABuilder.hpp
@@ -132,6 +132,7 @@ namespace IGC
         void GetVISAPredefinedVar(CVariable* pVar, PreDefined_Vars var);
         void CreateVISAVar(CVariable* var);
         void DeclareInput(CVariable* var, uint offset, uint instance);
+        void DeclarePred(CVariable* var, uint offset);
         void MarkAsOutput(CVariable* var);
         void MarkAsPayloadLiveOut(CVariable* var);
         void Compile(bool hasSymbolTable, GenXFunctionGroupAnalysis*& pFGA);

diff --git a/IGC/Compiler/CISACodeGen/CShader.cpp b/IGC/Compiler/CISACodeGen/CShader.cpp
@@ -527,6 +527,11 @@ void CShader::AddPatchTempSetup(CVariable* var)
     payloadTempSetup.push_back(var);
 }
 
+void CShader::AddPatchPredSetup(CVariable* var)
+{
+    payloadPredSetup.push_back(var);
+}
+
 bool CShader::AppendPayloadSetup(CVariable* var)
 {
     auto v = var->GetAlias() ? var->GetAlias() : var;
@@ -581,6 +586,20 @@ void CShader::AllocateOutput(CVariable* var, uint offset, uint instance)
     encoder.MarkAsOutput(var);
 }
 
+void CShader::AllocatePred(CVariable* var, uint offset, bool forceLiveOut)
+{
+    IGC_ASSERT(nullptr != var);
+    IGC_ASSERT(offset % (1u << var->GetAlign()) == 0);
+    encoder.DeclarePred(var, offset);
+    kernelArgToPayloadOffsetMap[var] = offset;
+    // For the payload section, we need to mark inputs to be outputs
+    // so that inputs will be alive across the entire payload section
+    if (forceLiveOut)
+    {
+        encoder.MarkAsPayloadLiveOut(var);
+    }
+}
+
 void CShader::AllocateConstants3DShader(uint& offset)
 {
     if (m_Platform->WaForceCB0ToBeZeroWhenSendingPC() && m_DriverInfo->implementPushConstantWA()) {

diff --git a/IGC/Compiler/CISACodeGen/EmitVISAPass.cpp b/IGC/Compiler/CISACodeGen/EmitVISAPass.cpp
@@ -4707,6 +4707,22 @@ void EmitPass::emitOutput(llvm::GenIntrinsicInst* inst)
     }
 }
 
+CVariable* EmitPass::GetVMaskPred(CVariable*& predicate)
+{
+    if (IGC_IS_FLAG_ENABLED(UseVMaskPredicate) &&
+        predicate == nullptr)
+    {
+        // Copy VMASK to a predicate
+        // (W) mov (1|M0) f0.0<1>:ud sr0.3<0;1,0>:ud
+        predicate = m_currShader->GetNewVariable(
+            numLanes(m_SimdMode),
+            ISA_TYPE_BOOL,
+            EALIGN_DWORD,
+            "");
+    }
+    return predicate;
+}
+
 void EmitPass::createVMaskPred(CVariable*& predicate)
 {
     if (!m_currShader->IsPatchablePS())
@@ -4715,24 +4731,26 @@ void EmitPass::createVMaskPred(CVariable*& predicate)
     if (predicate != nullptr)
         return;
 
-    uint32_t debug = IGC_GET_FLAG_VALUE(VMaskPredDebug);
-    if (debug < 1)
-        return;
-
     if (IGC_IS_FLAG_ENABLED(UseVMaskPredicate))
     {
         // Copy VMASK to a predicate
         // (W) mov (1|M0) f0.0<1>:ud sr0.3<0;1,0>:ud
-        predicate = m_currShader->GetNewVariable(
-            numLanes(m_SimdMode),
-            ISA_TYPE_BOOL,
-            EALIGN_DWORD,
-            true,
-            "VectorMaskPredicate");
+        predicate = GetVMaskPred(predicate);
+
+        if (m_encoder->IsCodePatchCandidate())
+        {
+            m_encoder->SetPayloadSectionAsPrimary();
+        }
+
         m_encoder->SetNoMask();
         m_encoder->SetSrcSubReg(0, 3);
         m_encoder->SetP(predicate, m_currShader->GetSR0());
         m_encoder->Push();
+
+        if (m_encoder->IsCodePatchCandidate())
+        {
+            m_encoder->SetPayloadSectionAsSecondary();
+        }
     }
 }
 
@@ -4744,10 +4762,6 @@ void EmitPass::UseVMaskPred()
     if (!m_vMaskPredForSubplane)
         return;
 
-    uint32_t debug = IGC_GET_FLAG_VALUE(VMaskPredDebug);
-    if (debug < 2)
-        return;
-
     bool subspan = m_encoder->IsSubSpanDestination();
     if (IGC_IS_FLAG_ENABLED(UseVMaskPredicate) && subspan && !m_destination->IsUniform())
     {

diff --git a/IGC/Compiler/CISACodeGen/EmitVISAPass.hpp b/IGC/Compiler/CISACodeGen/EmitVISAPass.hpp
@@ -366,6 +366,7 @@ class EmitPass : public llvm::FunctionPass
     void emitDiscardBranch(llvm::BranchInst* br, const SSource& cond);
     void emitAluNoModifier(llvm::GenIntrinsicInst* inst);
 
+    CVariable* GetVMaskPred(CVariable*& predicate);
     void createVMaskPred(CVariable*& predicate);
     void UseVMaskPred();
     CVariable* m_vMaskPredForSubplane = nullptr;

diff --git a/IGC/Compiler/CISACodeGen/ShaderCodeGen.hpp b/IGC/Compiler/CISACodeGen/ShaderCodeGen.hpp
@@ -147,6 +147,7 @@ class CShader
     void        AddSetup(uint index, CVariable* var);
     bool        AppendPayloadSetup(CVariable* var);
     void        AddPatchTempSetup(CVariable* var);
+    void        AddPatchPredSetup(CVariable* var);
     void        AddPatchConstantSetup(uint index, CVariable* var);
 
     // TODO: simplify calls to GetNewVariable to these shorter and more
@@ -252,6 +253,7 @@ class CShader
 
     void        AllocateInput(CVariable* var, uint offset, uint instance = 0, bool forceLiveOut = false);
     void        AllocateOutput(CVariable* var, uint offset, uint instance = 0);
+    void        AllocatePred(CVariable* var, uint offset, bool forceLiveOut = false);
     CVariable* ImmToVariable(uint64_t immediate, VISA_Type type, bool isCodePatchCandidate = false);
     CVariable* GetConstant(llvm::Constant* C, CVariable* dstVar = nullptr);
     CVariable* GetScalarConstant(llvm::Value* c);
@@ -691,6 +693,7 @@ class CShader
     std::vector<CVariable*> setup;
     std::vector<CVariable*> payloadLiveOutSetup;
     std::vector<CVariable*> payloadTempSetup;
+    std::vector<CVariable*> payloadPredSetup;
     std::vector<CVariable*> patchConstantSetup;
     std::vector<CVariable*> perPrimitiveSetup;
 

diff --git a/IGC/common/igc_flags.h b/IGC/common/igc_flags.h
@@ -396,7 +396,6 @@ DECLARE_IGC_REGKEY(bool, NoCatchAllDebugLine,           false, "Don't emit speci
 DECLARE_IGC_REGKEY(bool, EnableTestSplitI64,            false, "Test legalization that split i64 store unnecessarily, to be deleted once test is done[temp]", true)
 DECLARE_IGC_REGKEY(bool, ShaderDumpTranslationOnly,     false, "Dump LLVM IR right after translation from SPIRV to stderr and ignore all passes", false)
 DECLARE_IGC_REGKEY(bool, UseVMaskPredicate,             false, "Use VMask as predicate for subspan usage", false)
-DECLARE_IGC_REGKEY(DWORD, VMaskPredDebug,               2,     "Debug only; 0 - No VMaskPred; 1 - createVMaskPred; 2 - createVMaskPred and UseVMaskPred", false)
 
 DECLARE_IGC_GROUP("IGC Features")
 DECLARE_IGC_REGKEY(bool, EnableOCLSIMD16,               true,  "Enable OCL SIMD16 mode", true)