[SYCL] Refactor FPGA Memory Attributes Validation for Clarity and and Efficiency #6714
Triggered via pull request
July 13, 2024 23:25
Status
Failure
Total duration
1d 12h 59m 5s
Artifacts
1
sycl-linux-precommit.yml
on: pull_request
detect_changes
/
Decide which tests could be affected by the changes
6s
Matrix: test-perf
Waiting for pending jobs
Matrix: test
Annotations
2 errors and 3 warnings
Artifacts
Produced during runtime
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sycl_linux_default
Expired
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414 MB |
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