Skip to content
Check code formatting

[SYCL] Refactor FPGA Memory Attributes Validation for Clarity and and Efficiency #7423

Sign in to view logs

[SYCL] Refactor FPGA Memory Attributes Validation for Clarity and and Efficiency

[SYCL] Refactor FPGA Memory Attributes Validation for Clarity and and Efficiency #7423

Triggered via pull request July 16, 2024 22:01
@smanna12smanna12
synchronize #14566
smanna12:RefactorFPGAMemAttr
Status Success
Total duration 5m 25s
Artifacts 1

pr-code-format.yml

on: pull_request
code_formatter
5m 3s
code_formatter
Fit to window
Zoom out
Zoom in

Artifacts

Produced during runtime
Name Size
workflow-args
135 Bytes