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[SYCL][FPGA] Implement task_sequence header, properties, and add new fpga_cluster kernel property #12453
[SYCL][FPGA] Implement task_sequence header, properties, and add new fpga_cluster kernel property #12453
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You can test this locally with the following command:git-clang-format --diff 90f03ee7c82ed9c6f2e3c34d300e6c4b18fe1d67 f1ee83f32085094204d6715f38bdc664cc8f1906 -- sycl/include/sycl/ext/intel/experimental/task_sequence/properties.hpp sycl/include/sycl/ext/intel/experimental/task_sequence/task_sequence.hpp llvm/lib/SYCLLowerIR/CompileTimePropertiesPass.cpp sycl/include/CL/__spirv/spirv_ops.hpp sycl/include/sycl/ext/intel/experimental/fpga_kernel_properties.hpp sycl/include/sycl/ext/oneapi/properties/property.hpp sycl/test/extensions/properties/properties_kernel_fpga.cpp View the diff from clang-format here.diff --git a/sycl/include/CL/__spirv/spirv_ops.hpp b/sycl/include/CL/__spirv/spirv_ops.hpp
index 0419bc974f..6ddac0ebf6 100644
--- a/sycl/include/CL/__spirv/spirv_ops.hpp
+++ b/sycl/include/CL/__spirv/spirv_ops.hpp
@@ -995,8 +995,8 @@ __spirv_ConvertFToBF16INTEL(float) noexcept;
extern __DPCPP_SYCL_EXTERNAL float
__spirv_ConvertBF16ToFINTEL(uint16_t) noexcept;
-__SYCL_CONVERGENT__ extern __DPCPP_SYCL_EXTERNAL __SYCL_EXPORT
- __ocl_vec_t<uint32_t, 4>
+__SYCL_CONVERGENT__ extern __DPCPP_SYCL_EXTERNAL
+ __SYCL_EXPORT __ocl_vec_t<uint32_t, 4>
__spirv_GroupNonUniformBallot(uint32_t Execution, bool Predicate) noexcept;
// TODO: I'm not 100% sure that these NonUniform instructions should be
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Please add a clang test for the spirv type genrated. You may modify the one from #12820 if that is easier.
Added. There are some issues with my clang environment related to finding the correct gcc directory that is preventing me from using llvm-lit directly to check whether the LIT tests are passing. I'm basing the test CHECK conditions on manual clang++ compiles so the tests may require a bit more tweaking. |
@intel/dpcpp-tools-reviewers Can someone please review this PR? This is needed for the FPGA team's next release. |
@intel/llvm-gatekeepers PR has been fully approved, please merge whenever possible. |
There seem to be compilation issues. |
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Apologies, bad attempt after resolving the merge conflict through Github UI. Should be fixed now. |
Tests introduced here have been failing for more than a week in post-commit. @bowenxue-intel , @dm-vodopyanov , please FIX ASAP. @dm-vodopyanov , I want to remind that it's the gatekeeper's responsibility to watch for post-commit failures after PR is merged and work with author to address any failures.
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…add new fpga_cluster kernel property (intel#12453)" This reverts commit 7b9001e.
…add new fpga_cluster kernel property (intel#12453)" This reverts commit 7b9001e.
…add new fpga_cluster kernel property (intel#12453)" This reverts commit 7b9001e.
This change re-apply the task sequence changes from PR #12453 that were reverted in #14359 now that the spec has been approved and the back-end implementation is ready. The spec is also moved from proposed to experimental. --------- Co-authored-by: bowenxue-intel <bowen.xue@intel.com> Co-authored-by: Steffen Larsen <steffen.larsen@intel.com>
Implement task_sequence header, task_sequence properties, and fpga_cluster kernel property according to the spec updates #6348 (almost ready to be merged)
Header
Task Sequence Properties
FPGA Kernel properties