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Create one bitcode library for AMD #15055
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Enable compilation of libdevice for AMD by adding AMDGCN to macro guarded code parts in libdevice for enabling e.g. standard library math function. Add compilation workflow to SYCLLibdevice.cmake for AMD. Follow the compilation mechanism for NVPTX (3668c0a) and create a single bitcode library file. Do not select builtin LLVM intrinsics for AMDGCN by default to ensure that stdlib functions can be found when linking against libdevice. Ensure that the clang tests check for the correctness of the new clang driver actions and check if the driver still links the device code against the itt device libraries when device library linkage has been excluded. Fix a compilation error of Intel math function libraries for MSVC when targeting AMD. Include "device.h" before including "device_imf.hpp" to avoid the inclusion of <type_traits>, which failed with a redefinition of symbols error.
Check if device lib flags get treated correctly for AMDGCN and that the linking actions for the correct device libraries are generated.
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Looks reasonable to me! ⭐
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FE changes LGTM
ping @intel/dpcpp-clang-driver-reviewers |
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LGTM - thanks!
@ldrumm, it seems like this PR introduced some new failures on AMD in post-commit, could you please take a look? https://github.com/intel/llvm/actions/runs/11031105056/job/30637542157 It also looks like we have some problems with build log extraction, because logs below contain some random symbols as if we read logs from incorrect memory location.
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@frasercrmck @MartinWehking Can someone take a look at Alexey's comment about this change breaking HIP CI? Thanks. |
Yep we're taking a look 👍 |
This patch should fix all of the failures: We'll need to follow up on this to figure out what's going on with the build log, but it should be enough to unblock the CI |
Enable compilation of libdevice for AMD by adding AMDGCN to macro
guarded code parts in libdevice for enabling e.g. standard library
math function.
Add compilation workflow to SYCLLibdevice.cmake for AMD.
Follow the compilation mechanism for NVPTX
(56a6ae2)
and create a single bitcode library file.
Do not select builtin LLVM intrinsics for AMDGCN by default to ensure
that stdlib functions can be found when linking against libdevice.
Ensure that the clang tests check for the correctness of the new
clang driver actions and check if the driver still links the device
code against the itt device libraries when device library linkage has
been excluded.
Fix a compilation error of Intel math function libraries for MSVC
when targeting AMD. Include "device.h" before including "device_imf.hpp"
to avoid the inclusion of <type_traits>, which failed with a
redefinition of symbols error.