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Spit xbar into two levels #301

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@elliotb-lowrisc elliotb-lowrisc commented Oct 31, 2024

Attempt to reduce the depth of xbar logic on critical timing paths to/from the HyperRAM/SRAM by moving most peripherals from the main cross-bar to a new "peri" (peripheral) sub-crossbar. Keeps addresses the same, but some few devices have increased access latency due to being moved to xbar_peri or to improve QoR.

Blocks with increased access latency: timer, system_info, & hw_rev.

Blocks with decreased access latency: plic.

Seems to improve timing and area utilisation.

@elliotb-lowrisc elliotb-lowrisc marked this pull request as ready for review October 31, 2024 09:59
@elliotb-lowrisc elliotb-lowrisc marked this pull request as draft October 31, 2024 10:00
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rebased onto draft pinmux changes

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rebased

@elliotb-lowrisc elliotb-lowrisc marked this pull request as ready for review November 4, 2024 14:59
% for block in config.blocks:
% if not block.name == "gpio":
% if block.name not in ["gpio", "i2c", "spi"]:
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I think it may be nicer to add field to a block which states which crossbar it should be in. Instead of hard coding certain blocks in the templates.

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Fair enough, I've had a go. How does it look to you now?

Attempt to reduce the depth of xbar logic on critical timing paths
to/from the HyperRAM/SRAM by moving most peripherals
from the main cross-bar to a new "peri" (peripheral) sub-crossbar.
Keeps addresses the same, but some few devices have increased
access latency due to being moved to xbar_peri or to improve QoR.

Blocks with increased access latency: timer, system_info, & hw_rev.

Blocks with decreased access latency: plic.
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rebase

@marnovandermaas marnovandermaas marked this pull request as draft November 11, 2024 10:28
@elliotb-lowrisc elliotb-lowrisc marked this pull request as ready for review November 11, 2024 11:24
@elliotb-lowrisc elliotb-lowrisc marked this pull request as draft November 11, 2024 11:24
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4 participants