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Merge pull request #2776 from o1-labs/dw/implement-sra-riscv32
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o1vm/riscv32: implement R type instruction sra
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dannywillems authored Nov 20, 2024
2 parents dc49843 + 07e58b6 commit a5975c4
Showing 1 changed file with 11 additions and 1 deletion.
12 changes: 11 additions & 1 deletion o1vm/src/interpreters/riscv32im/interpreter.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1377,7 +1377,17 @@ pub fn interpret_rtype<Env: InterpreterEnv>(env: &mut Env, instr: RInstruction)
env.set_next_instruction_pointer(next_instruction_pointer + Env::constant(4u32));
}
RInstruction::ShiftRightArithmetic => {
unimplemented!("ShiftRightArithmetic");
/* sra: x[rd] = x[rs1] >> x[rs2] */
let local_rs1 = env.read_register(&rs1);
let local_rs2 = env.read_register(&rs2);
let local_rd = unsafe {
let pos = env.alloc_scratch();
env.shift_right_arithmetic(&local_rs1, &local_rs2, pos)
};
env.write_register(&rd, local_rd);

env.set_instruction_pointer(next_instruction_pointer.clone());
env.set_next_instruction_pointer(next_instruction_pointer + Env::constant(4u32));
}
RInstruction::Or => {
unimplemented!("Or")
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