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[CV32A65X] Update PMPADDRn spec to make bit 0 ROCST 0. Update config files. #2651

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zchamski
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@zchamski zchamski commented Dec 4, 2024

Update CV32A65X-annotated privileged ISA specification to reflect the fact that with PMP granularity 8 and only supported PMP address matching modes being OFF and TOR, bit 0 of the pmpaddr0..pmpaddr7 registers can be safely made read-only zero. Update riscv-config specifications and its generated files accordingly.

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github-actions bot commented Dec 4, 2024

✔️ successful run, report available here.

@JeanRochCoulon JeanRochCoulon merged commit ed89c71 into openhwgroup:master Dec 9, 2024
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@JeanRochCoulon JeanRochCoulon deleted the dev/doc/priv-spec-pmpaddr-behavior branch December 9, 2024 12:22
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